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Searched refs:fld (Results 1 – 25 of 67) sorted by relevance

123

/openbmc/linux/arch/riscv/kernel/
H A Dfpu.S71 fld f0, TASK_THREAD_F0_F0(a0)
72 fld f1, TASK_THREAD_F1_F0(a0)
73 fld f2, TASK_THREAD_F2_F0(a0)
74 fld f3, TASK_THREAD_F3_F0(a0)
75 fld f4, TASK_THREAD_F4_F0(a0)
76 fld f5, TASK_THREAD_F5_F0(a0)
77 fld f6, TASK_THREAD_F6_F0(a0)
78 fld f7, TASK_THREAD_F7_F0(a0)
79 fld f8, TASK_THREAD_F8_F0(a0)
80 fld f9, TASK_THREAD_F9_F0(a0)
[all …]
/openbmc/linux/include/linux/mlx5/
H A Ddevice.h51 #define __mlx5_bit_sz(typ, fld) sizeof(__mlx5_nullp(typ)->fld) argument
52 #define __mlx5_bit_off(typ, fld) (offsetof(struct mlx5_ifc_##typ##_bits, fld)) argument
53 #define __mlx5_16_off(typ, fld) (__mlx5_bit_off(typ, fld) / 16) argument
54 #define __mlx5_dw_off(typ, fld) (__mlx5_bit_off(typ, fld) / 32) argument
55 #define __mlx5_64_off(typ, fld) (__mlx5_bit_off(typ, fld) / 64) argument
56 #define __mlx5_16_bit_off(typ, fld) (16 - __mlx5_bit_sz(typ, fld) - (__mlx5_bit_off(typ, fld) & 0xf… argument
57 #define __mlx5_dw_bit_off(typ, fld) (32 - __mlx5_bit_sz(typ, fld) - (__mlx5_bit_off(typ, fld) & 0x1… argument
58 #define __mlx5_mask(typ, fld) ((u32)((1ull << __mlx5_bit_sz(typ, fld)) - 1)) argument
59 #define __mlx5_dw_mask(typ, fld) (__mlx5_mask(typ, fld) << __mlx5_dw_bit_off(typ, fld)) argument
60 #define __mlx5_mask16(typ, fld) ((u16)((1ull << __mlx5_bit_sz(typ, fld)) - 1)) argument
[all …]
/openbmc/linux/drivers/net/ethernet/mellanox/mlx5/core/
H A Den_stats.h45 #define MLX5E_DECLARE_STAT(type, fld) #fld, offsetof(type, fld) argument
46 #define MLX5E_DECLARE_RX_STAT(type, fld) "rx%d_"#fld, offsetof(type, fld) argument
47 #define MLX5E_DECLARE_TX_STAT(type, fld) "tx%d_"#fld, offsetof(type, fld) argument
48 #define MLX5E_DECLARE_XDPSQ_STAT(type, fld) "tx%d_xdp_"#fld, offsetof(type, fld) argument
49 #define MLX5E_DECLARE_RQ_XDPSQ_STAT(type, fld) "rx%d_xdp_tx_"#fld, offsetof(type, fld) argument
50 #define MLX5E_DECLARE_XSKRQ_STAT(type, fld) "rx%d_xsk_"#fld, offsetof(type, fld) argument
51 #define MLX5E_DECLARE_XSKSQ_STAT(type, fld) "tx%d_xsk_"#fld, offsetof(type, fld) argument
52 #define MLX5E_DECLARE_CH_STAT(type, fld) "ch%d_"#fld, offsetof(type, fld) argument
54 #define MLX5E_DECLARE_PTP_TX_STAT(type, fld) "ptp_tx%d_"#fld, offsetof(type, fld) argument
55 #define MLX5E_DECLARE_PTP_CH_STAT(type, fld) "ptp_ch_"#fld, offsetof(type, fld) argument
[all …]
/openbmc/linux/arch/riscv/kvm/
H A Dvcpu_switch.S373 fld f0, KVM_ARCH_FP_D_F0(a0)
374 fld f1, KVM_ARCH_FP_D_F1(a0)
375 fld f2, KVM_ARCH_FP_D_F2(a0)
376 fld f3, KVM_ARCH_FP_D_F3(a0)
377 fld f4, KVM_ARCH_FP_D_F4(a0)
378 fld f5, KVM_ARCH_FP_D_F5(a0)
379 fld f6, KVM_ARCH_FP_D_F6(a0)
380 fld f7, KVM_ARCH_FP_D_F7(a0)
381 fld f8, KVM_ARCH_FP_D_F8(a0)
382 fld f9, KVM_ARCH_FP_D_F9(a0)
[all …]
/openbmc/linux/scripts/coccinelle/misc/
H A Ddoubleinit.cocci18 identifier I, s, fld;
23 struct I s =@p0 { ..., .fld@p = E, ...};
26 identifier I, s, r.fld;
31 struct I s =@p0 { ..., .fld@p = E, ...};
35 fld << r.fld;
41 cocci.print_main(fld,p0)
47 fld << r.fld;
53 msg = "%s: first occurrence line %s, second occurrence line %s" % (fld,ps[0].line,pr[0].line)
/openbmc/linux/drivers/net/ethernet/mellanox/mlx5/core/diag/
H A Dfs_tracepoint.c39 #define MASK_VAL(type, spec, name, mask, val, fld) \ argument
41 {.m = MLX5_GET(spec, mask, fld),\
42 .v = MLX5_GET(spec, val, fld)}
43 #define MASK_VAL_BE(type, spec, name, mask, val, fld) \ argument
45 {.m = MLX5_GET_BE(type, spec, mask, fld),\
46 .v = MLX5_GET_BE(type, spec, val, fld)}
49 #define GET_MASK_VAL(name, type, mask, val, fld) \ argument
50 (name.m = MLX5_GET(type, mask, fld), \
51 name.v = MLX5_GET(type, val, fld), \
66 #define MASK_VAL_L2(type, name, fld) \ in print_lyr_2_4_hdrs() argument
[all …]
/openbmc/linux/arch/loongarch/kernel/
H A Dfpu.S64 EX fld.d $f0, \base, (0 * FPU_REG_WIDTH)
65 EX fld.d $f1, \base, (1 * FPU_REG_WIDTH)
66 EX fld.d $f2, \base, (2 * FPU_REG_WIDTH)
67 EX fld.d $f3, \base, (3 * FPU_REG_WIDTH)
68 EX fld.d $f4, \base, (4 * FPU_REG_WIDTH)
69 EX fld.d $f5, \base, (5 * FPU_REG_WIDTH)
70 EX fld.d $f6, \base, (6 * FPU_REG_WIDTH)
71 EX fld.d $f7, \base, (7 * FPU_REG_WIDTH)
72 EX fld.d $f8, \base, (8 * FPU_REG_WIDTH)
73 EX fld.d $f9, \base, (9 * FPU_REG_WIDTH)
[all …]
/openbmc/u-boot/tools/
H A Dublimage.c73 char *name, int lineno, int fld, int dcd_len) in parse_cfg_cmd() argument
109 char *token, char *name, int lineno, int fld, int *dcd_len) in parse_cfg_fld() argument
112 switch (fld) { in parse_cfg_fld()
123 parse_cfg_cmd(ublhdr, *cmd, token, name, lineno, fld, *dcd_len); in parse_cfg_fld()
137 int fld; in parse_cfg_file() local
167 for (fld = CFG_COMMAND, cmd = CMD_INVALID, in parse_cfg_file()
168 line = token; ; line = NULL, fld++) { in parse_cfg_file()
178 lineno, fld, &dcd_len); in parse_cfg_file()
H A Dimximage.c144 int fld, uint32_t value, uint32_t off) in set_dcd_val_v1() argument
148 switch (fld) { in set_dcd_val_v1()
238 int fld, uint32_t value, uint32_t off) in set_dcd_val_v2() argument
246 switch (fld) { in set_dcd_val_v2()
600 char *name, int lineno, int fld, int dcd_len) in parse_cfg_cmd() argument
659 (*set_dcd_val)(imxhdr, name, lineno, fld, value, dcd_len); in parse_cfg_cmd()
682 char *token, char *name, int lineno, int fld, int *dcd_len) in parse_cfg_fld() argument
686 switch (fld) { in parse_cfg_fld()
697 parse_cfg_cmd(imxhdr, *cmd, token, name, lineno, fld, *dcd_len); in parse_cfg_fld()
711 (*set_dcd_val)(imxhdr, name, lineno, fld, value, in parse_cfg_fld()
[all …]
/openbmc/qemu/target/ppc/
H A Dfpu_helper.c1570 #define VSX_ADD_SUB(name, op, nels, tp, fld, sfifprf, r2sp) \ argument
1582 t.fld = tp##_##op(xa->fld, xb->fld, &tstat); \
1591 t.fld = do_frsp(env, t.fld, GETPC()); \
1595 helper_compute_fprf_float64(env, t.fld); \
1646 #define VSX_MUL(op, nels, tp, fld, sfifprf, r2sp) \ argument
1658 t.fld = tp##_mul(xa->fld, xb->fld, &tstat); \
1667 t.fld = do_frsp(env, t.fld, GETPC()); \
1671 helper_compute_fprf_float64(env, t.fld); \
1717 #define VSX_DIV(op, nels, tp, fld, sfifprf, r2sp) \ argument
1729 t.fld = tp##_div(xa->fld, xb->fld, &tstat); \
[all …]
/openbmc/linux/scripts/gcc-plugins/
H A Dlatent_entropy_plugin.c167 tree fld, lst = TYPE_FIELDS(type); in handle_latent_entropy_attribute() local
170 for (fld = lst; fld; nelt++, fld = TREE_CHAIN(fld)) { in handle_latent_entropy_attribute()
173 fieldtype = TREE_TYPE(fld); in handle_latent_entropy_attribute()
179 *node, name, fld); in handle_latent_entropy_attribute()
183 if (fld) in handle_latent_entropy_attribute()
188 for (fld = lst; fld; fld = TREE_CHAIN(fld)) { in handle_latent_entropy_attribute()
189 tree random_const, fld_t = TREE_TYPE(fld); in handle_latent_entropy_attribute()
192 CONSTRUCTOR_APPEND_ELT(vals, fld, random_const); in handle_latent_entropy_attribute()
/openbmc/qemu/scripts/coccinelle/
H A Dqom-parent-type.cocci5 identifier obj_t, fld;
9 parent_t fld;
20 identifier match.obj_t, match.fld;
24 * parent_t fld;
/openbmc/linux/arch/loongarch/include/asm/
H A Dasmmacro.h171 fld.d $f0, \tmp, THREAD_FPR0 - THREAD_FPR0
172 fld.d $f1, \tmp, THREAD_FPR1 - THREAD_FPR0
173 fld.d $f2, \tmp, THREAD_FPR2 - THREAD_FPR0
174 fld.d $f3, \tmp, THREAD_FPR3 - THREAD_FPR0
175 fld.d $f4, \tmp, THREAD_FPR4 - THREAD_FPR0
176 fld.d $f5, \tmp, THREAD_FPR5 - THREAD_FPR0
177 fld.d $f6, \tmp, THREAD_FPR6 - THREAD_FPR0
178 fld.d $f7, \tmp, THREAD_FPR7 - THREAD_FPR0
179 fld.d $f8, \tmp, THREAD_FPR8 - THREAD_FPR0
180 fld.d $f9, \tmp, THREAD_FPR9 - THREAD_FPR0
[all …]
/openbmc/linux/arch/arm64/include/asm/
H A Del2_setup.h236 .macro __check_override idreg, fld, width, pass, fail, tmp1, tmp2
237 ubfx \tmp1, \tmp1, #\fld, #\width
243 ubfx \tmp2, \tmp2, #\fld, #\width
244 ubfx \tmp1, \tmp1, #\fld, #\width
253 .macro check_override idreg, fld, pass, fail, tmp1, tmp2
255 __check_override \idreg \fld 4 \pass \fail \tmp1 \tmp2
259 .macro __check_override idreg, fld, width, pass, fail, tmp, ignore
261 ubfx \tmp, \tmp, #\fld, #\width
266 .macro check_override idreg, fld, pass, fail, tmp, ignore
267 __check_override \idreg \fld 4 \pass \fail \tmp \ignore
/openbmc/u-boot/board/gdsys/common/
H A Dosd.c38 #define OSD_SET_REG(screen, fld, val) \ argument
41 FPGA_SET_REG(screen - OSD_DH_BASE, osd1.fld, val); \
43 FPGA_SET_REG(screen, osd0.fld, val); \
46 #define OSD_SET_REG(screen, fld, val) \ argument
47 FPGA_SET_REG(screen, osd0.fld, val)
51 #define OSD_GET_REG(screen, fld, val) \ argument
54 FPGA_GET_REG(screen - OSD_DH_BASE, osd1.fld, val); \
56 FPGA_GET_REG(screen, osd0.fld, val); \
59 #define OSD_GET_REG(screen, fld, val) \ argument
60 FPGA_GET_REG(screen, osd0.fld, val)
/openbmc/u-boot/drivers/i2c/
H A Dihs_i2c.c38 #define I2C_SET_REG(fld, val) \ argument
41 FPGA_SET_REG(I2C_ADAP_HWNR & 0xf, i2c1.fld, val); \
43 FPGA_SET_REG(I2C_ADAP_HWNR, i2c0.fld, val); \
46 #define I2C_SET_REG(fld, val) \ argument
47 FPGA_SET_REG(I2C_ADAP_HWNR, i2c0.fld, val)
51 #define I2C_GET_REG(fld, val) \ argument
54 FPGA_GET_REG(I2C_ADAP_HWNR & 0xf, i2c1.fld, val); \
56 FPGA_GET_REG(I2C_ADAP_HWNR, i2c0.fld, val); \
59 #define I2C_GET_REG(fld, val) \ argument
60 FPGA_GET_REG(I2C_ADAP_HWNR, i2c0.fld, val)
/openbmc/linux/drivers/clk/baikal-t1/
H A Dccu-pll.c385 struct ccu_pll_dbgfs_fld *fld = priv; in ccu_pll_dbgfs_fld_set() local
386 struct ccu_pll *pll = fld->pll; in ccu_pll_dbgfs_fld_set()
390 val = clamp_t(u64, val, fld->min, fld->max); in ccu_pll_dbgfs_fld_set()
391 data = ((val - 1) << fld->lsb) & fld->mask; in ccu_pll_dbgfs_fld_set()
394 regmap_update_bits(pll->sys_regs, pll->reg_ctl + fld->reg, fld->mask, in ccu_pll_dbgfs_fld_set()
427 struct ccu_pll_dbgfs_fld *fld = priv; in ccu_pll_dbgfs_fld_get() local
428 struct ccu_pll *pll = fld->pll; in ccu_pll_dbgfs_fld_get()
431 regmap_read(pll->sys_regs, pll->reg_ctl + fld->reg, &data); in ccu_pll_dbgfs_fld_get()
432 *val = ((data & fld->mask) >> fld->lsb) + 1; in ccu_pll_dbgfs_fld_get()
/openbmc/linux/drivers/net/ethernet/intel/ice/
H A Dice_flow.c900 u8 seg, enum ice_flow_field fld, u64 match) in ice_flow_xtract_fld() argument
913 switch (fld) { in ice_flow_xtract_fld()
937 if (fld == ICE_FLOW_FIELD_IDX_IPV4_TTL) in ice_flow_xtract_fld()
939 else if (fld == ICE_FLOW_FIELD_IDX_IPV4_PROT) in ice_flow_xtract_fld()
956 if (fld == ICE_FLOW_FIELD_IDX_IPV6_TTL) in ice_flow_xtract_fld()
958 else if (fld == ICE_FLOW_FIELD_IDX_IPV6_PROT) in ice_flow_xtract_fld()
1027 sib = fld == ICE_FLOW_FIELD_IDX_ICMP_TYPE ? in ice_flow_xtract_fld()
1043 flds[fld].xtrct.prot_id = prot_id; in ice_flow_xtract_fld()
1044 flds[fld].xtrct.off = (ice_flds_info[fld].off / ese_bits) * in ice_flow_xtract_fld()
1046 flds[fld].xtrct.disp = (u8)(ice_flds_info[fld].off % ese_bits); in ice_flow_xtract_fld()
[all …]
/openbmc/u-boot/include/
H A Dgdsys_fpga.h25 #define FPGA_SET_REG(ix, fld, val) \ argument
27 &fpga_ptr[ix]->fld, \
28 offsetof(struct ihs_fpga, fld), \
31 #define FPGA_GET_REG(ix, fld, val) \ argument
33 &fpga_ptr[ix]->fld, \
34 offsetof(struct ihs_fpga, fld), \
/openbmc/linux/drivers/power/supply/
H A Dmp2629_charger.c172 enum mp2629_field fld, in mp2629_get_prop() argument
178 ret = regmap_field_read(charger->regmap_fields[fld], &rval); in mp2629_get_prop()
182 val->intval = rval * props[fld].step + props[fld].min; in mp2629_get_prop()
188 enum mp2629_field fld, in mp2629_set_prop() argument
193 if (val->intval < props[fld].min || val->intval > props[fld].max) in mp2629_set_prop()
196 rval = (val->intval - props[fld].min) / props[fld].step; in mp2629_set_prop()
197 return regmap_field_write(charger->regmap_fields[fld], rval); in mp2629_set_prop()
/openbmc/linux/drivers/perf/
H A Darm_spe_pmu.c996 int fld; in __arm_spe_pmu_dev_probe() local
1001 fld = cpuid_feature_extract_unsigned_field(read_cpuid(ID_AA64DFR0_EL1), in __arm_spe_pmu_dev_probe()
1003 if (!fld) { in __arm_spe_pmu_dev_probe()
1006 fld, smp_processor_id()); in __arm_spe_pmu_dev_probe()
1009 spe_pmu->pmsver = (u16)fld; in __arm_spe_pmu_dev_probe()
1020 fld = FIELD_GET(PMBIDR_EL1_ALIGN, reg); in __arm_spe_pmu_dev_probe()
1021 spe_pmu->align = 1 << fld; in __arm_spe_pmu_dev_probe()
1024 fld, smp_processor_id()); in __arm_spe_pmu_dev_probe()
1052 fld = FIELD_GET(PMSIDR_EL1_INTERVAL, reg); in __arm_spe_pmu_dev_probe()
1053 switch (fld) { in __arm_spe_pmu_dev_probe()
[all …]
/openbmc/linux/drivers/net/ethernet/mellanox/mlx5/core/lib/
H A Dtout.c106 #define MLX5_TIMEOUT_QUERY(fld, reg_out) \ argument
112 time_field = MLX5_ADDR_OF(dtor_reg, reg_out, fld); \
119 #define MLX5_TIMEOUT_FILL(fld, reg_out, dev, to_type, to_extra) \ argument
121 u64 fw_to = MLX5_TIMEOUT_QUERY(fld, reg_out); \
/openbmc/linux/drivers/accel/ivpu/
H A Divpu_hw_reg_io.h56 #define REGB_POLL_FLD(reg, fld, val, timeout_us) \ argument
59 REGB_POLL(reg, var, (FIELD_GET(reg##_##fld##_MASK, var) == (val)), timeout_us); \
62 #define REGV_POLL_FLD(reg, fld, val, timeout_us) \ argument
65 REGV_POLL(reg, var, (FIELD_GET(reg##_##fld##_MASK, var) == (val)), timeout_us); \
/openbmc/linux/drivers/media/platform/ti/vpe/
H A Dvpdma.h200 #define ADB_ADDR(dma_buf, str, fld) ((dma_buf)->addr + offsetof(str, fld)) argument
201 #define MMR_ADB_ADDR(buf, str, fld) ADB_ADDR(&(buf), struct str, fld) argument
/openbmc/linux/drivers/net/ethernet/netronome/nfp/
H A Dnfp_net_xsk.c24 rx_ring->rxds[idx].fld.reserved = 0; in nfp_net_xsk_rx_bufs_stash()
25 rx_ring->rxds[idx].fld.meta_len_dd = 0; in nfp_net_xsk_rx_bufs_stash()
77 nfp_desc_set_dma_addr_48b(&rx_ring->rxds[wr_idx].fld, in nfp_net_xsk_rx_ring_fill_freelist()

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