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Searched refs:fence_drv (Results 1 – 25 of 49) sorted by relevance

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/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_fence.c103 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_fence_write()
119 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_fence_read()
163 seq = ++ring->fence_drv.sync_seq; in amdgpu_fence_emit()
172 &ring->fence_drv.lock, in amdgpu_fence_emit()
178 &ring->fence_drv.lock, in amdgpu_fence_emit()
183 amdgpu_ring_emit_fence(ring, ring->fence_drv.gpu_addr, in amdgpu_fence_emit()
186 ptr = &ring->fence_drv.fences[seq & ring->fence_drv.num_fences_mask]; in amdgpu_fence_emit()
234 seq = ++ring->fence_drv.sync_seq; in amdgpu_fence_emit_polling()
236 seq - ring->fence_drv.num_fences_mask, in amdgpu_fence_emit_polling()
241 amdgpu_ring_emit_fence(ring, ring->fence_drv.gpu_addr, in amdgpu_fence_emit_polling()
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H A Damdgpu_ring_mux.c99 last_seq = atomic_read(&e->ring->fence_drv.last_seq); in amdgpu_mux_resubmit_chunks()
109 le32_to_cpu(*(e->ring->fence_drv.cpu_addr + 2))) { in amdgpu_mux_resubmit_chunks()
475 last_seq = atomic_read(&ring->fence_drv.last_seq); in scan_and_remove_signaled_chunk()
538 chunk->sync_seq = READ_ONCE(ring->fence_drv.sync_seq); in amdgpu_ring_mux_end_ib()
571 mux->seqno_to_resubmit = ring->fence_drv.sync_seq; in amdgpu_mcbp_handle_trailing_fence_irq()
H A Damdgpu_job.c63 job->base.sched->name, atomic_read(&ring->fence_drv.last_seq), in amdgpu_job_timedout()
64 ring->fence_drv.sync_seq); in amdgpu_job_timedout()
H A Damdgpu_debugfs.c1805 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_ib_preempt_fences_swap()
1808 last_seq = atomic_read(&ring->fence_drv.last_seq); in amdgpu_ib_preempt_fences_swap()
1809 sync_seq = ring->fence_drv.sync_seq; in amdgpu_ib_preempt_fences_swap()
1866 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_ib_preempt_mark_partial_job()
1919 length = ring->fence_drv.num_fences_mask + 1; in amdgpu_debugfs_ib_preempt()
1941 if (atomic_read(&ring->fence_drv.last_seq) != in amdgpu_debugfs_ib_preempt()
1942 ring->fence_drv.sync_seq) { in amdgpu_debugfs_ib_preempt()
H A Duvd_v6_0.c1088 uint32_t seq = ring->fence_drv.sync_seq; in uvd_v6_0_ring_emit_pipeline_sync()
1089 uint64_t addr = ring->fence_drv.gpu_addr; in uvd_v6_0_ring_emit_pipeline_sync()
1117 uint32_t seq = ring->fence_drv.sync_seq; in uvd_v6_0_enc_ring_emit_pipeline_sync()
1118 uint64_t addr = ring->fence_drv.gpu_addr; in uvd_v6_0_enc_ring_emit_pipeline_sync()
H A Dmes_v10_1.c110 api_status->api_completion_fence_addr = mes->ring.fence_drv.gpu_addr; in mes_v10_1_submit_pkt_and_poll_completion()
111 api_status->api_completion_fence_value = ++mes->ring.fence_drv.sync_seq; in mes_v10_1_submit_pkt_and_poll_completion()
119 r = amdgpu_fence_wait_polling(ring, ring->fence_drv.sync_seq, in mes_v10_1_submit_pkt_and_poll_completion()
H A Dsi_dma.c420 uint32_t seq = ring->fence_drv.sync_seq; in si_dma_ring_emit_pipeline_sync()
421 uint64_t addr = ring->fence_drv.gpu_addr; in si_dma_ring_emit_pipeline_sync()
H A Dvce_v3_0.c890 uint32_t seq = ring->fence_drv.sync_seq; in vce_v3_0_emit_pipeline_sync()
891 uint64_t addr = ring->fence_drv.gpu_addr; in vce_v3_0_emit_pipeline_sync()
H A Dmes_v11_0.c125 api_status->api_completion_fence_addr = mes->ring.fence_drv.gpu_addr; in mes_v11_0_submit_pkt_and_poll_completion()
126 api_status->api_completion_fence_value = ++mes->ring.fence_drv.sync_seq; in mes_v11_0_submit_pkt_and_poll_completion()
134 r = amdgpu_fence_wait_polling(ring, ring->fence_drv.sync_seq, in mes_v11_0_submit_pkt_and_poll_completion()
H A Dsdma_v2_4.c764 uint32_t seq = ring->fence_drv.sync_seq; in sdma_v2_4_ring_emit_pipeline_sync()
765 uint64_t addr = ring->fence_drv.gpu_addr; in sdma_v2_4_ring_emit_pipeline_sync()
H A Dcik_sdma.c827 uint32_t seq = ring->fence_drv.sync_seq; in cik_sdma_ring_emit_pipeline_sync()
828 uint64_t addr = ring->fence_drv.gpu_addr; in cik_sdma_ring_emit_pipeline_sync()
H A Damdgpu_ring.h241 struct amdgpu_fence_driver fence_drv; member
H A Dsdma_v3_0.c1035 uint32_t seq = ring->fence_drv.sync_seq; in sdma_v3_0_ring_emit_pipeline_sync()
1036 uint64_t addr = ring->fence_drv.gpu_addr; in sdma_v3_0_ring_emit_pipeline_sync()
/openbmc/linux/drivers/gpu/drm/radeon/
H A Dradeon_fence.c69 struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; in radeon_fence_write()
90 struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; in radeon_fence_read()
120 &rdev->fence_drv[ring].lockup_work, in radeon_fence_schedule_check()
146 (*fence)->seq = seq = ++rdev->fence_drv[ring].sync_seq[ring]; in radeon_fence_emit()
177 seq = atomic64_read(&fence->rdev->fence_drv[fence->ring].last_seq); in radeon_fence_check_signaled()
224 last_seq = atomic64_read(&rdev->fence_drv[ring].last_seq); in radeon_fence_activity()
226 last_emitted = rdev->fence_drv[ring].sync_seq[ring]; in radeon_fence_activity()
251 } while (atomic64_xchg(&rdev->fence_drv[ring].last_seq, seq) > seq); in radeon_fence_activity()
269 struct radeon_fence_driver *fence_drv; in radeon_fence_check_lockup() local
273 fence_drv = container_of(work, struct radeon_fence_driver, in radeon_fence_check_lockup()
[all …]
H A Duvd_v2_2.c43 uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr; in uvd_v2_2_fence_emit()
H A Devergreen_dma.c44 u64 addr = rdev->fence_drv[fence->ring].gpu_addr; in evergreen_dma_fence_ring_emit()
H A Duvd_v1_0.c85 uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr; in uvd_v1_0_fence_emit()
H A Dr600_dma.c290 u64 addr = rdev->fence_drv[fence->ring].gpu_addr; in r600_dma_fence_ring_emit()
/openbmc/linux/drivers/gpu/drm/virtio/
H A Dvirtgpu_fence.c79 struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv; in virtio_gpu_fence_alloc()
105 struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv; in virtio_gpu_fence_emit()
130 struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv; in virtio_gpu_fence_event_process()
135 atomic64_set(&vgdev->fence_drv.last_fence_id, fence_id); in virtio_gpu_fence_event_process()
H A Dvirtgpu_debugfs.c75 (u64)atomic64_read(&vgdev->fence_drv.last_fence_id), in virtio_gpu_debugfs_irq_info()
76 vgdev->fence_drv.current_fence_id); in virtio_gpu_debugfs_irq_info()
H A Dvirtgpu_kms.c150 vgdev->fence_drv.context = dma_fence_context_alloc(1); in virtio_gpu_init()
151 spin_lock_init(&vgdev->fence_drv.lock); in virtio_gpu_init()
152 INIT_LIST_HEAD(&vgdev->fence_drv.fences); in virtio_gpu_init()
H A Dvirtgpu_ioctl.c162 fence = virtio_gpu_fence_alloc(vgdev, vgdev->fence_drv.context, 0); in virtio_gpu_resource_create_ioctl()
249 fence = virtio_gpu_fence_alloc(vgdev, vgdev->fence_drv.context, 0); in virtio_gpu_transfer_from_host_ioctl()
309 fence = virtio_gpu_fence_alloc(vgdev, vgdev->fence_drv.context, in virtio_gpu_transfer_to_host_ioctl()
H A Dvirtgpu_drv.h245 struct virtio_gpu_fence_driver fence_drv; member
H A Dvirtgpu_submit.c478 u64 fence_ctx = vgdev->fence_drv.context; in virtio_gpu_execbuffer_ioctl()
H A Dvirtgpu_plane.c281 vgdev->fence_drv.context, in virtio_gpu_plane_prepare_fb()

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