Searched refs:fZE16_32 (Results 1 – 3 of 3) sorted by relevance
/openbmc/qemu/target/hexagon/ |
H A D | macros.h | 389 #define fZE16_32(A) ((uint32_t)((uint16_t)(A))) macro 399 #define fMPY16UU(A, B) fZE32_64(fZE16_32(A) * fZE16_32(B)) 400 #define fMPY16SU(A, B) fSE32_64(fSE16_32(A) * fZE16_32(B))
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/openbmc/qemu/target/hexagon/imported/ |
H A D | macros.def | 688 fZE16_32, /* zero-extend 16 to 32 */ 750 fZE32_64(fZE16_32(A)*fZE16_32(B)), /* behavior */ 756 fSE32_64(fSE16_32(A)*fZE16_32(B)), /* behavior */
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/openbmc/qemu/target/hexagon/imported/mmvec/ |
H A D | ext.idef | 386 …)", "Unpack halves with zero-extend", fVARRAY_ELEMENT_ACCESS(VddV, uw, i) = fZE16_32(VuV.uh[i])) 390 … "Unpack halves to odd halves", fVARRAY_ELEMENT_ACCESS(VxxV, uw, i) |= fZE16_32(VuV.uh[i])<<16) 461 VddV.v[0].uw[i] = fZE16_32(fGETUHALF(0, VuV.uw[i])); 462 VddV.v[1].uw[i] = fZE16_32(fGETUHALF(1, VuV.uw[i]))) 1242 VddV.v[0].w[i] = fZE16_32(fGETUHALF(0, VuV.uw[i])) + fZE16_32(fGETUHALF(0, VvV.uw[i])); 1243 VddV.v[1].w[i] = fZE16_32(fGETUHALF(1, VuV.uw[i])) + fZE16_32(fGETUHALF(1, VvV.uw[i]))) 1247 VddV.v[0].w[i] = fZE16_32(fGETUHALF(0, VuV.uw[i])) - fZE16_32(fGETUHALF(0, VvV.uw[i])); 1248 VddV.v[1].w[i] = fZE16_32(fGETUHALF(1, VuV.uw[i])) - fZE16_32(fGETUHALF(1, VvV.uw[i])))
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