| /openbmc/linux/drivers/regulator/ |
| H A D | hi6421-regulator.c | 129 #define HI6421_LDO(_id, _match, v_table, vreg, vmask, ereg, emask, \ argument
145 .enable_mask = emask, \
169 ereg, emask, odelay, ecomask, ecoamp) \ argument
185 .enable_mask = emask, \
209 ereg, emask, odelay, ecomask, ecoamp) \ argument
225 .enable_mask = emask, \
245 #define HI6421_BUCK012(_id, _match, vreg, vmask, ereg, emask, sleepmask,\ argument
262 .enable_mask = emask, \
282 #define HI6421_BUCK345(_id, _match, v_table, vreg, vmask, ereg, emask, \ argument
298 .enable_mask = emask, \
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| H A D | hi6421v530-regulator.c | 73 #define HI6421V530_LDO(_ID, v_table, vreg, vmask, ereg, emask, \ argument
88 .enable_mask = emask, \
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| H A D | rn5t618-regulator.c | 25 #define REG(rid, ereg, emask, vreg, vmask, min, max, step) \ argument
38 .enable_mask = (emask), \
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| H A D | hi6421v600-regulator.c | 74 #define HI6421V600_LDO(_id, vtable, ereg, emask, vreg, \ argument
90 .enable_mask = emask, \
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| H A D | mt6360-regulator.c | 322 #define MT6360_REGULATOR_DESC(match, _name, _sname, ereg, emask, vreg, \ argument
339 .enable_mask = emask, \
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| /openbmc/linux/drivers/perf/ |
| H A D | thunderx2_pmu.c | 369 u32 val, emask; in uncore_start_event_l3c() local
374 emask = tx2_pmu->events_mask; in uncore_start_event_l3c()
377 val = GET_EVENTID(event, emask) << 3; in uncore_start_event_l3c()
390 u32 val, cmask, emask; in uncore_start_event_dmc() local
397 emask = tx2_pmu->events_mask; in uncore_start_event_dmc()
400 event_id = GET_EVENTID(event, emask); in uncore_start_event_dmc()
432 u32 emask; in uncore_start_event_ccpi2() local
437 emask = tx2_pmu->events_mask; in uncore_start_event_ccpi2()
445 GET_EVENTID(event, emask)), hwc->config_base); in uncore_start_event_ccpi2()
470 u32 cmask, emask; in tx2_uncore_event_update() local
[all …]
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| /openbmc/u-boot/arch/arm/mach-zynq/ |
| H A D | timer.c | 59 const u32 emask = SCUTIMER_CONTROL_AUTO_RELOAD_MASK | in timer_init() local
92 emask); in timer_init()
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| /openbmc/linux/drivers/pinctrl/samsung/ |
| H A D | pinctrl-s3c64xx.c | 117 #define PIN_BANK_4BIT_EINTW(pins, reg, id, eoffs, emask) \ argument
124 .eint_mask = emask, \
141 #define PIN_BANK_4BIT2_EINTW(pins, reg, id, eoffs, emask) \ argument
148 .eint_mask = emask, \
171 #define PIN_BANK_2BIT_EINTG(pins, reg, id, eoffs, emask) \ argument
178 .eint_mask = emask, \
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| /openbmc/linux/arch/arm64/lib/ |
| H A D | insn.c | 1346 u64 emask = BIT(tmp) - 1; in aarch64_encode_immediate() local
1348 if ((imm & emask) != ((imm >> tmp) & emask)) in aarch64_encode_immediate()
1352 mask = emask; in aarch64_encode_immediate()
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| /openbmc/qemu/target/arm/tcg/ |
| H A D | mve_helper.c | 2608 uint16_t emask = MAKE_64BIT_MASK(0, ESIZE); \ in DO_VIDUP_ALL()
2613 beatpred |= r * emask; \ in DO_VIDUP_ALL()
2614 emask <<= ESIZE; \ in DO_VIDUP_ALL()
2630 uint16_t emask = MAKE_64BIT_MASK(0, ESIZE); \
2635 beatpred |= r * emask; \
2636 emask <<= ESIZE; \
3162 uint16_t emask = MAKE_64BIT_MASK(0, ESIZE); \
3167 for (e = 0; e < 16 / ESIZE; e++, emask <<= ESIZE) { \
3168 if ((mask & emask) == 0) { \
3180 beatpred |= r * emask; \
[all …]
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| /openbmc/u-boot/drivers/misc/ |
| H A D | fsl_iim.c | 82 u32 emask; member
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| /openbmc/linux/arch/x86/events/intel/ |
| H A D | p4.c | 751 unsigned int v, emask; in p4_validate_raw_event() local
785 emask = p4_config_unpack_escr(event->attr.config) & P4_ESCR_EVENTMASK_MASK; in p4_validate_raw_event()
786 if (emask & ~p4_event_bind_map[v].escr_emask) in p4_validate_raw_event()
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| /openbmc/u-boot/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 495 u32 emask; member
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| /openbmc/linux/drivers/gpu/drm/i915/ |
| H A D | intel_uncore.c | 2310 intel_engine_mask_t emask; in intel_uncore_fw_domains_init() local
2314 emask = uncore->gt->info.engine_mask; in intel_uncore_fw_domains_init()
2332 if (!__HAS_ENGINE(emask, _VCS(i))) in intel_uncore_fw_domains_init()
2340 if (!__HAS_ENGINE(emask, _VECS(i))) in intel_uncore_fw_domains_init()
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