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Searched refs:dstate (Results 1 – 11 of 11) sorted by relevance

/openbmc/qemu/trace/
H A Dcontrol-target.c24 state_pre = *ev->dstate; in trace_event_set_state_dynamic_init()
28 *ev->dstate = 1; in trace_event_set_state_dynamic_init()
31 *ev->dstate = 0; in trace_event_set_state_dynamic_init()
46 bool state_pre = *ev->dstate; in trace_event_set_state_dynamic()
50 *ev->dstate = 1; in trace_event_set_state_dynamic()
53 *ev->dstate = 0; in trace_event_set_state_dynamic()
H A Devent-internal.h37 uint16_t *dstate; member
H A Dcontrol-internal.h46 return unlikely(trace_events_enabled_count) && *ev->dstate; in trace_event_get_state_dynamic()
/openbmc/qemu/stubs/
H A Dtrace-control.c28 state_pre = *(ev->dstate); in trace_event_set_state_dynamic()
32 *(ev->dstate) = 1; in trace_event_set_state_dynamic()
35 *(ev->dstate) = 0; in trace_event_set_state_dynamic()
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dbase.c312 clk->astate, clk->temp, clk->dstate); in nvkm_pstate_work()
318 pstate = max(pstate, clk->dstate); in nvkm_pstate_work()
554 if (!rel) clk->dstate = req; in nvkm_clk_dstate()
555 if ( rel) clk->dstate += rel; in nvkm_clk_dstate()
556 clk->dstate = min(clk->dstate, clk->state_nr - 1); in nvkm_clk_dstate()
557 clk->dstate = max(clk->dstate, 0); in nvkm_clk_dstate()
616 clk->dstate = 0; in nvkm_clk_init()
/openbmc/qemu/scripts/tracetool/format/
H A Dc.py44 dstate = e.api(e.QEMU_DSTATE))
/openbmc/linux/drivers/pci/controller/dwc/
H A Dpcie-qcom-ep.c647 u32 dstate, val; in qcom_pcie_ep_global_irq_thread() local
667 dstate = dw_pcie_readl_dbi(pci, DBI_CON_STATUS) & in qcom_pcie_ep_global_irq_thread()
669 dev_dbg(dev, "Received D%d state event\n", dstate); in qcom_pcie_ep_global_irq_thread()
670 if (dstate == 3) { in qcom_pcie_ep_global_irq_thread()
/openbmc/linux/drivers/gpu/drm/nouveau/include/nvkm/subdev/
H A Dclk.h101 int dstate; /* display adjustment (min+) */ member
/openbmc/linux/drivers/gpu/drm/i915/
H A Dintel_clock_gating.c730 u32 dstate = intel_uncore_read(&i915->uncore, D_STATE); in gen3_init_clock_gating() local
732 dstate |= DSTATE_PLL_D3_OFF | DSTATE_GFX_CLOCK_GATING | in gen3_init_clock_gating()
734 intel_uncore_write(&i915->uncore, D_STATE, dstate); in gen3_init_clock_gating()
/openbmc/qemu/include/hw/cxl/
H A Dcxl_device.h332 #define cxl_device_cap_init(dstate, reg, cap_id, ver) \ argument
334 uint32_t *cap_hdrs = dstate->caps_reg_state32; \
/openbmc/linux/drivers/staging/rts5208/
H A Drtsx_chip.c1728 static void rtsx_handle_pm_dstate(struct rtsx_chip *chip, u8 dstate) in rtsx_handle_pm_dstate() argument
1733 chip->product_id, dstate); in rtsx_handle_pm_dstate()
1746 rtsx_write_cfg_dw(chip, func_no, 0x84, 0xFF, dstate); in rtsx_handle_pm_dstate()
1749 rtsx_write_config_byte(chip, 0x44, dstate); in rtsx_handle_pm_dstate()