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Searched refs:dppclk_khz (Results 1 – 25 of 25) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
H A Ddcn20_clk_mgr.c109 clk_mgr->dccg->ref_dppclk = clk_mgr->base.clks.dppclk_khz; in dcn20_update_clocks_update_dpp_dto()
111 int dpp_inst, dppclk_khz, prev_dppclk_khz; in dcn20_update_clocks_update_dpp_dto() local
117 dppclk_khz = context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz; in dcn20_update_clocks_update_dpp_dto()
121 if (safe_to_lower || prev_dppclk_khz < dppclk_khz) in dcn20_update_clocks_update_dpp_dto()
123 clk_mgr->dccg, dpp_inst, dppclk_khz); in dcn20_update_clocks_update_dpp_dto()
136 if (clk_mgr->base.clks.dppclk_khz == 0 || clk_mgr->base.clks.dispclk_khz == 0) in dcn20_update_clocks_update_dentist()
140 * clk_mgr->base.dentist_vco_freq_khz / clk_mgr->base.clks.dppclk_khz; in dcn20_update_clocks_update_dentist()
296 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn2_update_clocks()
297 if (clk_mgr->base.clks.dppclk_khz > new_clocks->dppclk_khz) in dcn2_update_clocks()
299 clk_mgr->base.clks.dppclk_khz = new_clocks->dppclk_khz; in dcn2_update_clocks()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
H A Drn_clk_mgr.c114 int dpp_inst, dppclk_khz, prev_dppclk_khz; in rn_update_clocks_update_dpp_dto() local
120 dppclk_khz = context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz; in rn_update_clocks_update_dpp_dto()
124 if (safe_to_lower || prev_dppclk_khz < dppclk_khz) in rn_update_clocks_update_dpp_dto()
126 clk_mgr->dccg, dpp_inst, dppclk_khz); in rn_update_clocks_update_dpp_dto()
187 if (new_clocks->dppclk_khz < 100000 && new_clocks->dppclk_khz > 0) in rn_update_clocks()
188 new_clocks->dppclk_khz = 100000; in rn_update_clocks()
194 if (new_clocks->dppclk_khz == 0 || new_clocks->dispclk_khz == 0) { in rn_update_clocks()
195 new_clocks->dppclk_khz = clk_mgr_base->clks.dppclk_khz; in rn_update_clocks()
199 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr_base->clks.dppclk_khz)) { in rn_update_clocks()
200 if (clk_mgr_base->clks.dppclk_khz > new_clocks->dppclk_khz) in rn_update_clocks()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/
H A Ddcn201_clk_mgr.c139 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn201_update_clocks()
140 if (clk_mgr->base.clks.dppclk_khz > new_clocks->dppclk_khz) in dcn201_update_clocks()
142 clk_mgr->base.clks.dppclk_khz = new_clocks->dppclk_khz; in dcn201_update_clocks()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
H A Ddcn316_clk_mgr.c202 if (new_clocks->dppclk_khz < 100000) in dcn316_update_clocks()
203 new_clocks->dppclk_khz = 100000; in dcn316_update_clocks()
207 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn316_update_clocks()
208 if (clk_mgr->base.clks.dppclk_khz > new_clocks->dppclk_khz) in dcn316_update_clocks()
210 clk_mgr_base->clks.dppclk_khz = new_clocks->dppclk_khz; in dcn316_update_clocks()
227 dcn316_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz); in dcn316_update_clocks()
231 dcn316_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz); in dcn316_update_clocks()
233 if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz) in dcn316_update_clocks()
245 cmd.notify_clocks.clocks.dppclk_khz = clk_mgr_base->clks.dppclk_khz; in dcn316_update_clocks()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
H A Ddcn32_clk_mgr.c281 if (new_clocks->dppclk_khz) { in dcn32_update_dppclk_dispclk_freq()
283 * clk_mgr->base.dentist_vco_freq_khz / new_clocks->dppclk_khz; in dcn32_update_dppclk_dispclk_freq()
284 …new_clocks->dppclk_khz = (DENTIST_DIVIDER_RANGE_SCALE_FACTOR * clk_mgr->base.dentist_vco_freq_khz)… in dcn32_update_dppclk_dispclk_freq()
298 clk_mgr->dccg->ref_dppclk = clk_mgr->base.clks.dppclk_khz; in dcn32_update_clocks_update_dpp_dto()
300 int dpp_inst = 0, dppclk_khz, prev_dppclk_khz; in dcn32_update_clocks_update_dpp_dto() local
302 dppclk_khz = context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz; in dcn32_update_clocks_update_dpp_dto()
306 else if (!context->res_ctx.pipe_ctx[i].plane_res.dpp && dppclk_khz == 0) { in dcn32_update_clocks_update_dpp_dto()
311 } else if (!context->res_ctx.pipe_ctx[i].plane_res.dpp && dppclk_khz > 0) { in dcn32_update_clocks_update_dpp_dto()
321 if (safe_to_lower || prev_dppclk_khz < dppclk_khz) in dcn32_update_clocks_update_dpp_dto()
323 clk_mgr->dccg, dpp_inst, dppclk_khz); in dcn32_update_clocks_update_dpp_dto()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_clk_mgr.c213 if (new_clocks->dppclk_khz < 100000) in dcn31_update_clocks()
214 new_clocks->dppclk_khz = 100000; in dcn31_update_clocks()
216 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn31_update_clocks()
217 if (clk_mgr->base.clks.dppclk_khz > new_clocks->dppclk_khz) in dcn31_update_clocks()
219 clk_mgr_base->clks.dppclk_khz = new_clocks->dppclk_khz; in dcn31_update_clocks()
236 dcn31_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz); in dcn31_update_clocks()
240 dcn31_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz); in dcn31_update_clocks()
242 if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz) in dcn31_update_clocks()
254 cmd.notify_clocks.clocks.dppclk_khz = clk_mgr_base->clks.dppclk_khz; in dcn31_update_clocks()
314 else if (a->dppclk_khz != b->dppclk_khz) in dcn31_are_clock_states_equal()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_clk_mgr.c195 if (new_clocks->dppclk_khz < MIN_DPP_DISP_CLK) in dcn315_update_clocks()
196 new_clocks->dppclk_khz = MIN_DPP_DISP_CLK; in dcn315_update_clocks()
200 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn315_update_clocks()
201 if (clk_mgr->base.clks.dppclk_khz > new_clocks->dppclk_khz) in dcn315_update_clocks()
203 clk_mgr_base->clks.dppclk_khz = new_clocks->dppclk_khz; in dcn315_update_clocks()
223 dcn315_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz); in dcn315_update_clocks()
227 dcn315_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz); in dcn315_update_clocks()
229 if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz) in dcn315_update_clocks()
241 cmd.notify_clocks.clocks.dppclk_khz = clk_mgr_base->clks.dppclk_khz; in dcn315_update_clocks()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_clk_mgr.c241 if (new_clocks->dppclk_khz < 100000) in dcn314_update_clocks()
242 new_clocks->dppclk_khz = 100000; in dcn314_update_clocks()
244 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn314_update_clocks()
245 if (clk_mgr->base.clks.dppclk_khz > new_clocks->dppclk_khz) in dcn314_update_clocks()
247 clk_mgr_base->clks.dppclk_khz = new_clocks->dppclk_khz; in dcn314_update_clocks()
264 dcn314_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz); in dcn314_update_clocks()
268 dcn314_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz); in dcn314_update_clocks()
270 if (new_clocks->dppclk_khz >= dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz) in dcn314_update_clocks()
282 cmd.notify_clocks.clocks.dppclk_khz = clk_mgr_base->clks.dppclk_khz; in dcn314_update_clocks()
329 else if (a->dppclk_khz != b->dppclk_khz) in dcn314_are_clock_states_equal()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
H A Dvg_clk_mgr.c154 if (new_clocks->dppclk_khz < 100000) in vg_update_clocks()
155 new_clocks->dppclk_khz = 100000; in vg_update_clocks()
157 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in vg_update_clocks()
158 if (clk_mgr->base.clks.dppclk_khz > new_clocks->dppclk_khz) in vg_update_clocks()
160 clk_mgr_base->clks.dppclk_khz = new_clocks->dppclk_khz; in vg_update_clocks()
174 dcn301_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz); in vg_update_clocks()
178 dcn301_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz); in vg_update_clocks()
470 else if (a->dppclk_khz != b->dppclk_khz) in vg_are_clock_states_equal()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
H A Ddcn30_clk_mgr.c285 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr_base->clks.dppclk_khz)) { in dcn3_update_clocks()
286 if (clk_mgr_base->clks.dppclk_khz > new_clocks->dppclk_khz) in dcn3_update_clocks()
289 clk_mgr_base->clks.dppclk_khz = new_clocks->dppclk_khz; in dcn3_update_clocks()
290 …30_smu_set_hard_min_by_freq(clk_mgr, PPCLK_PIXCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dppclk_khz)); in dcn3_update_clocks()
440 else if (a->dppclk_khz != b->dppclk_khz) in dcn3_are_clock_states_equal()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
H A Drv1_clk_mgr.c44 bool request_dpp_div = new_clocks->dispclk_khz > new_clocks->dppclk_khz; in rv1_determine_dppclk_threshold()
47 bool cur_dpp_div = clk_mgr->base.clks.dispclk_khz > clk_mgr->base.clks.dppclk_khz; in rv1_determine_dppclk_threshold()
96 bool request_dpp_div = new_clocks->dispclk_khz > new_clocks->dppclk_khz; in ramp_up_dispclk_with_dpp()
186 clk_mgr->base.clks.dppclk_khz = new_clocks->dppclk_khz; in ramp_up_dispclk_with_dpp()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_debug.c352 context->bw_ctx.bw.dcn.clk.dppclk_khz, in context_clock_trace()
360 context->bw_ctx.bw.dcn.clk.dppclk_khz, in context_clock_trace()
H A Ddc.c4659 info->dppClock = (unsigned int)state->bw_ctx.bw.dcn.clk.dppclk_khz; in get_clock_requirements_for_state()
/openbmc/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_trace.h495 __field(int, dppclk_khz)
514 __entry->dppclk_khz = clk->dppclk_khz;
538 __entry->dppclk_khz,
/openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Dcore_types.h295 int dppclk_khz; member
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c558 context->bw_ctx.bw.dcn.clk.dppclk_khz = 0; in dcn31_calculate_wm_and_dlg_fp()
566 context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz = 0; in dcn31_calculate_wm_and_dlg_fp()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_hw_sequencer.c467 dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz, in dcn10_log_hw_state()
1493 if (dc->clk_mgr->clks.dispclk_khz != 0 && dc->clk_mgr->clks.dppclk_khz != 0) { in dcn10_init_hw()
1495 dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz = dc->clk_mgr->clks.dppclk_khz; in dcn10_init_hw()
2740 context->bw_ctx.bw.dcn.clk.dppclk_khz <= in dcn10_update_dchubp_dpp()
2752 pipe_ctx->plane_res.bw.dppclk_khz); in dcn10_update_dchubp_dpp()
2754 dc->clk_mgr->clks.dppclk_khz = should_divided_by_2 ? in dcn10_update_dchubp_dpp()
3857 current_clocks->dppclk_khz = clk_khz; in dcn10_set_clock()
H A Ddcn10_hw_sequencer_debug.c479 dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz, in dcn10_get_clock_states()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c1376 context->bw_ctx.bw.dcn.clk.dppclk_khz = 0; in dcn32_calculate_dlg_params()
1426 if (context->bw_ctx.bw.dcn.clk.dppclk_khz < pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000) in dcn32_calculate_dlg_params()
1427 context->bw_ctx.bw.dcn.clk.dppclk_khz = pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000; in dcn32_calculate_dlg_params()
1429 … context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz = pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000; in dcn32_calculate_dlg_params()
1431 context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz = 0; in dcn32_calculate_dlg_params()
1471 context->bw_ctx.bw.dcn.clk.dppclk_khz = 0; in dcn32_calculate_dlg_params()
1480 context->bw_ctx.bw.dcn.clk.bw_dppclk_khz = context->bw_ctx.bw.dcn.clk.dppclk_khz; in dcn32_calculate_dlg_params()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.c1166 context->bw_ctx.bw.dcn.clk.dppclk_khz = 0; in dcn20_calculate_dlg_params()
1192 if (context->bw_ctx.bw.dcn.clk.dppclk_khz < pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000) in dcn20_calculate_dlg_params()
1193 context->bw_ctx.bw.dcn.clk.dppclk_khz = pipes[pipe_idx].clks_cfg.dppclk_mhz * 1000; in dcn20_calculate_dlg_params()
1194 context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz = in dcn20_calculate_dlg_params()
1210 context->bw_ctx.bw.dcn.clk.bw_dppclk_khz = context->bw_ctx.bw.dcn.clk.dppclk_khz; in dcn20_calculate_dlg_params()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_hwseq.c1426 if (old_pipe->plane_res.bw.dppclk_khz != new_pipe->plane_res.bw.dppclk_khz) in dcn20_detect_pipe_changes()
1511 dccg->funcs->update_dpp_dto(dccg, dpp->inst, pipe_ctx->plane_res.bw.dppclk_khz); in dcn20_update_dchubp_dpp()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/calcs/
H A Ddcn_calcs.c1175 context->bw_ctx.bw.dcn.clk.dppclk_khz = context->bw_ctx.bw.dcn.clk.dispclk_khz / in dcn_validate_bandwidth()
1420 dc, DM_PP_CLOCK_TYPE_DPPCLK, clocks->dppclk_khz); in dcn_find_dcfclk_suits_all()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc.h526 int dppclk_khz; member
/openbmc/linux/drivers/gpu/drm/amd/display/dmub/inc/
H A Ddmub_cmd.h1401 uint32_t dppclk_khz; /**< dppclk kHz */ member
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_hwseq.c745 clocks->dppclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].dppclk_mhz * 1000; in dcn32_initialize_min_clocks()