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Searched refs:dpcd_caps (Results 1 – 25 of 35) sorted by relevance

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/openbmc/linux/drivers/gpu/drm/amd/display/dc/link/protocols/
H A Dlink_dp_capability.c108 return (link->dpcd_caps.dongle_type >= DISPLAY_DONGLE_DP_VGA_CONVERTER) && in is_dp_active_dongle()
109 (link->dpcd_caps.dongle_type <= DISPLAY_DONGLE_DP_HDMI_CONVERTER); in is_dp_active_dongle()
114 return link->dpcd_caps.is_branch_dev; in is_dp_branch_device()
284 if (!link->dpcd_caps.dpcd_rev.raw) { in dp_wa_power_up_0010FA()
289 link->dpcd_caps.dpcd_rev.raw = dpcd_data[ in dp_wa_power_up_0010FA()
292 } while (retry++ < 4 && !link->dpcd_caps.dpcd_rev.raw); in dp_wa_power_up_0010FA()
295 if (link->dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_VGA_CONVERTER) { in dp_wa_power_up_0010FA()
296 switch (link->dpcd_caps.branch_dev_id) { in dp_wa_power_up_0010FA()
329 link->dpcd_caps.fec_cap.bits.FEC_CAPABLE); in dp_is_fec_supported()
343 && (link->dpcd_caps.dsc_caps.dsc_basic_caps.fields. in dp_should_enable_fec()
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H A Dlink_ddc.c219 if (link->dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_VGA_CONVERTER && in defer_delay_converter_wa()
220 link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_0080E1 && in defer_delay_converter_wa()
221 (link->dpcd_caps.branch_fw_revision[0] < 0x01 || in defer_delay_converter_wa()
222 (link->dpcd_caps.branch_fw_revision[0] == 0x01 && in defer_delay_converter_wa()
223 link->dpcd_caps.branch_fw_revision[1] < 0x40)) && in defer_delay_converter_wa()
224 !memcmp(link->dpcd_caps.branch_dev_name, in defer_delay_converter_wa()
226 sizeof(link->dpcd_caps.branch_dev_name))) in defer_delay_converter_wa()
231 if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_0080E1 && in defer_delay_converter_wa()
232 !memcmp(link->dpcd_caps.branch_dev_name, in defer_delay_converter_wa()
234 sizeof(link->dpcd_caps.branch_dev_name))) in defer_delay_converter_wa()
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H A Dlink_dp_dpia.c68 link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.raw = in dpcd_get_tunneling_device_data()
70 link->dpcd_caps.usb4_dp_tun_info.dpia_info.raw = in dpcd_get_tunneling_device_data()
72 link->dpcd_caps.usb4_dp_tun_info.usb4_driver_id = in dpcd_get_tunneling_device_data()
76 link->dpcd_caps.usb4_dp_tun_info.usb4_topology_id[i] = dpcd_topology_data[i]; in dpcd_get_tunneling_device_data()
H A Dlink_edp_panel_control.c94 link->dpcd_caps.panel_mode_edp, in dp_set_panel_mode()
106 switch (link->dpcd_caps.branch_dev_id) { in dp_get_panel_mode()
115 link->dpcd_caps.branch_dev_name, in dp_get_panel_mode()
118 link->dpcd_caps. in dp_get_panel_mode()
129 if (strncmp(link->dpcd_caps.branch_dev_name, in dp_get_panel_mode()
132 link->dpcd_caps. in dp_get_panel_mode()
142 if (link->dpcd_caps.panel_mode_edp && in dp_get_panel_mode()
172 if (!link->dpcd_caps.panel_luminance_control) { in edp_set_backlight_level_nits()
258 if (!link->dpcd_caps.panel_luminance_control) { in read_default_bl_aux()
295 …if (link->dpcd_caps.edp_supported_link_rates_count == 0 || !link->panel_config.ilr.optimize_edp_li… in edp_is_ilr_optimization_enabled()
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H A Dlink_dp_training_8b_10b.c46 link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_12) { in get_cr_training_aux_rd_interval()
72 link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_12) { in get_eq_training_aux_rd_interval()
316 link->dpcd_caps.lttpr_caps.aux_rd_interval[offset - 1]); in perform_8b_10b_channel_equalization_sequence()
376 repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt); in dp_perform_8b_10b_link_training()
H A Dlink_dp_training.c767 struct dpcd_caps *rx_caps = &link->dpcd_caps; in decide_eq_training_pattern()
894 link->dpcd_caps.lttpr_caps.mode = repeater_mode; in configure_lttpr_mode_non_transparent()
908 link->dpcd_caps.lttpr_caps.mode = repeater_mode; in configure_lttpr_mode_non_transparent()
912 repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt); in configure_lttpr_mode_non_transparent()
918 link->dpcd_caps.lttpr_caps.aux_rd_interval[--repeater_cnt] = 0; in configure_lttpr_mode_non_transparent()
926 (uint8_t *)&link->dpcd_caps.lttpr_caps.aux_rd_interval[repeater_id - 1], in configure_lttpr_mode_non_transparent()
927 sizeof(link->dpcd_caps.lttpr_caps.aux_rd_interval[repeater_id - 1])); in configure_lttpr_mode_non_transparent()
928 link->dpcd_caps.lttpr_caps.aux_rd_interval[repeater_id - 1] &= 0x7F; in configure_lttpr_mode_non_transparent()
1057 link->dpcd_caps.max_ln_count.bits.POST_LT_ADJ_REQ_SUPPORTED; in dpcd_set_link_settings()
1066 if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_13 && in dpcd_set_link_settings()
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H A Dlink_dp_training_dpia.c305 repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt); in dpia_training_cr_non_transparent()
590 link->dpcd_caps.lttpr_caps.aux_rd_interval[hop - 1]); in dpia_get_eq_aux_rd_interval()
638 repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt); in dpia_training_eq_non_transparent()
907 repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt); in dpia_training_end()
1011 repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt); in dpia_perform_link_training()
H A Dlink_dp_training_fixed_vs_pe_retimer.c147 repeater_cnt = dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt); in perform_fixed_vs_pe_nontransparent_training_sequence()
197 link->dpcd_caps.lttpr_caps.phy_repeater_cnt); in dp_perform_fixed_vs_pe_training_sequence_legacy()
260 link->dpcd_caps.max_ln_count.bits.POST_LT_ADJ_REQ_SUPPORTED; in dp_perform_fixed_vs_pe_training_sequence_legacy()
541 link->dpcd_caps.lttpr_caps.phy_repeater_cnt); in dp_perform_fixed_vs_pe_training_sequence()
606 link->dpcd_caps.max_ln_count.bits.POST_LT_ADJ_REQ_SUPPORTED; in dp_perform_fixed_vs_pe_training_sequence()
H A Dlink_dp_phy.c91 return (dp_parse_lttpr_repeater_count(link->dpcd_caps.lttpr_caps.phy_repeater_cnt) == in is_immediate_downstream()
/openbmc/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_psr.c46 if (!link->dpcd_caps.alpm_caps.bits.AUX_WAKE_ALPM_CAP || in link_supports_psrsu()
47 !link->dpcd_caps.psr_info.psr_dpcd_caps.bits.Y_COORDINATE_REQUIRED) in link_supports_psrsu()
50 if (link->dpcd_caps.psr_info.psr_dpcd_caps.bits.SU_GRANULARITY_REQUIRED && in link_supports_psrsu()
51 !link->dpcd_caps.psr_info.psr2_su_y_granularity_cap) in link_supports_psrsu()
74 if (link->dpcd_caps.psr_info.psr_version == 0) { in amdgpu_dm_set_psr_caps()
90 link->dpcd_caps.psr_info.psr_version, in amdgpu_dm_set_psr_caps()
91 link->dpcd_caps.psr_info.psr_dpcd_caps.raw, in amdgpu_dm_set_psr_caps()
92 link->dpcd_caps.psr_info.psr2_su_y_granularity_cap); in amdgpu_dm_set_psr_caps()
H A Damdgpu_dm_replay.c43 struct dpcd_caps *dpcd_caps = &link->dpcd_caps; in link_supports_replay() local
44 struct adaptive_sync_caps *as_caps = &link->dpcd_caps.adaptive_sync_caps; in link_supports_replay()
53 if (dpcd_caps->edp_rev < EDP_REVISION_13) in link_supports_replay()
56 if (!dpcd_caps->alpm_caps.bits.AUX_WAKE_ALPM_CAP) in link_supports_replay()
H A Damdgpu_dm_helpers.c760 memcmp(stream->link->dpcd_caps.branch_dev_name, in write_dsc_enable_synaptics_non_virtual_dpcd_mst()
847 if (stream->sink->link->dpcd_caps.dongle_type == DISPLAY_DONGLE_NONE) { in dm_helpers_dp_write_dsc_enable()
850 } else if (stream->sink->link->dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER) { in dm_helpers_dp_write_dsc_enable()
1270 struct dpcd_caps *dpcd_caps = &link->dpcd_caps; in dm_get_adaptive_sync_support_type() local
1273 switch (dpcd_caps->dongle_type) { in dm_get_adaptive_sync_support_type()
1275 if (dpcd_caps->adaptive_sync_caps.dp_adap_sync_caps.bits.ADAPTIVE_SYNC_SDP_SUPPORT == true && in dm_get_adaptive_sync_support_type()
1276 dpcd_caps->allow_invalid_MSA_timing_param == true && in dm_get_adaptive_sync_support_type()
1277 dm_is_freesync_pcon_whitelist(dpcd_caps->branch_dev_id)) in dm_get_adaptive_sync_support_type()
H A Damdgpu_dm_mst_types.c204 if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_90CC24 && in needs_dsc_aux_workaround()
205 (link->dpcd_caps.dpcd_rev.raw == DPCD_REV_14 || link->dpcd_caps.dpcd_rev.raw == DPCD_REV_12) && in needs_dsc_aux_workaround()
206 link->dpcd_caps.sink_count.bits.SINK_COUNT >= 2) in needs_dsc_aux_workaround()
217 if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_90CC24 && in is_synaptics_cascaded_panamera()
218 IS_SYNAPTICS_CASCADED_PANAMERA(link->dpcd_caps.branch_dev_name, branch_vendor_data)) { in is_synaptics_cascaded_panamera()
648 if (link_status->dpcd_caps->dpcd_rev.raw < 0x12) { in dm_handle_mst_sideband_msg_ready_event()
1222 if (!(dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT || in is_dsc_need_re_compute()
1223 dc_link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_PASSTHROUGH_SUPPORT)) in is_dsc_need_re_compute()
1439 &dc_link->dpcd_caps.dsc_caps.dsc_basic_caps; in is_link_to_dschub()
H A Damdgpu_dm_debugfs.c574 struct dc_lttpr_caps caps = aconnector->dc_link->dpcd_caps.lttpr_caps; in dp_lttpr_status_show()
991 seq_printf(m, "Sink support: %s", str_yes_no(link->dpcd_caps.psr_info.psr_version != 0)); in psr_capability_show()
992 if (link->dpcd_caps.psr_info.psr_version) in psr_capability_show()
993 seq_printf(m, " [0x%02x]", link->dpcd_caps.psr_info.psr_version); in psr_capability_show()
1263 struct dpcd_caps dpcd_caps; in dp_dsc_fec_support_show() local
1283 dpcd_caps = aconnector->dc_link->dpcd_caps; in dp_dsc_fec_support_show()
1295 is_fec_supported = dpcd_caps.fec_cap.raw & 0x1; in dp_dsc_fec_support_show()
1296 is_dsc_supported = dpcd_caps.dsc_caps.dsc_basic_caps.raw[0] & 0x1; in dp_dsc_fec_support_show()
3038 dpcd_rev = link->dpcd_caps.dpcd_rev.raw; in edp_ilr_show()
3110 if (param[1] >= link->dpcd_caps.edp_supported_link_rates_count) in edp_ilr_write()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/link/
H A Dlink_validation.c58 const struct dpcd_caps *dpcd_caps) in dp_active_dongle_validate_timing() argument
60 const struct dc_dongle_caps *dongle_caps = &dpcd_caps->dongle_caps; in dp_active_dongle_validate_timing()
62 switch (dpcd_caps->dongle_type) { in dp_active_dongle_validate_timing()
74 if (dpcd_caps->dongle_type == DISPLAY_DONGLE_DP_HDMI_CONVERTER && in dp_active_dongle_validate_timing()
142 if (dpcd_caps->channel_coding_cap.bits.DP_128b_132b_SUPPORTED == 0 && in dp_active_dongle_validate_timing()
143 dpcd_caps->dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_PASSTHROUGH_SUPPORT == 0 && in dp_active_dongle_validate_timing()
271 !link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED && in dp_validate_mode_timing()
317 struct dpcd_caps *dpcd_caps = &link->dpcd_caps; in link_validate_mode_timing() local
330 if (!dp_active_dongle_validate_timing(timing, dpcd_caps)) in link_validate_mode_timing()
H A Dlink_detection.c555 if (link_rate_set < link->dpcd_caps.edp_supported_link_rates_count) { in read_current_link_settings_on_detect()
557 link->dpcd_caps.edp_supported_link_rates[link_rate_set]; in read_current_link_settings_on_detect()
604 link->dpcd_caps.dongle_type = sink_caps->dongle_type; in detect_dp()
605 link->dpcd_caps.is_dongle_type_one = sink_caps->is_dongle_type_one; in detect_dp()
606 link->dpcd_caps.dpcd_rev.raw = 0; in detect_dp()
686 link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_90CC24 && in apply_dpia_mst_dsc_always_on_wa()
687 link->dpcd_caps.branch_hw_revision == DP_BRANCH_HW_REV_20 && in apply_dpia_mst_dsc_always_on_wa()
688 link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT && in apply_dpia_mst_dsc_always_on_wa()
820 if (link->dpcd_caps.is_mst_capable || in should_verify_link_capability_destructively()
860 struct dpcd_caps prev_dpcd_caps; in detect_link_and_local_sink()
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H A Dlink_factory.c486 link->link_status.dpcd_caps = &link->dpcd_caps; in construct_phy()
774 link->link_status.dpcd_caps = &link->dpcd_caps; in construct_dpia()
/openbmc/linux/drivers/gpu/drm/amd/display/modules/power/
H A Dpower_helpers.c821 struct dpcd_caps *dpcd_caps = &link->dpcd_caps; in is_psr_su_specific_panel() local
823 if (dpcd_caps->edp_rev >= DP_EDP_14) { in is_psr_su_specific_panel()
824 if (dpcd_caps->psr_info.psr_version >= DP_PSR2_WITH_Y_COORD_ET_SUPPORTED) in is_psr_su_specific_panel()
831 if (dpcd_caps->sink_dev_id == DP_BRANCH_DEVICE_ID_001CF8) { in is_psr_su_specific_panel()
836 if (dpcd_caps->psr_info.psr_version < DP_PSR2_WITH_Y_COORD_IS_SUPPORTED) in is_psr_su_specific_panel()
838 else if (dpcd_caps->dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT && in is_psr_su_specific_panel()
839 ((dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x08) || in is_psr_su_specific_panel()
840 (dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x07))) in is_psr_su_specific_panel()
842 else if (dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x03) in is_psr_su_specific_panel()
844 else if (dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x01) in is_psr_su_specific_panel()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddmub_psr.c390 link->dpcd_caps.sink_dev_id == DP_DEVICE_ID_38EC11 && in dmub_psr_copy_settings()
391 !memcmp(link->dpcd_caps.sink_dev_id_str, DP_SINK_DEVICE_STR_ID_1, in dmub_psr_copy_settings()
398 if (((link->dpcd_caps.fec_cap.bits.FEC_CAPABLE && in dmub_psr_copy_settings()
400 (link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT && in dmub_psr_copy_settings()
403 link->dpcd_caps.sink_dev_id == DP_DEVICE_ID_38EC11 && in dmub_psr_copy_settings()
404 (!memcmp(link->dpcd_caps.sink_dev_id_str, DP_SINK_DEVICE_STR_ID_1, in dmub_psr_copy_settings()
406 !memcmp(link->dpcd_caps.sink_dev_id_str, DP_SINK_DEVICE_STR_ID_2, in dmub_psr_copy_settings()
414 if (link->dpcd_caps.sink_dev_id == DP_BRANCH_DEVICE_ID_001CF8) in dmub_psr_copy_settings()
H A Ddmub_replay.c190 copy_settings_data->pixel_deviation_per_line = link->dpcd_caps.pr_info.pixel_deviation_per_line; in dmub_replay_copy_settings()
191 copy_settings_data->max_deviation_line = link->dpcd_caps.pr_info.max_deviation_line; in dmub_replay_copy_settings()
199 if (((link->dpcd_caps.fec_cap.bits.FEC_CAPABLE && in dmub_replay_copy_settings()
201 (link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT && in dmub_replay_copy_settings()
204 link->dpcd_caps.sink_dev_id == DP_DEVICE_ID_38EC11 /*&& in dmub_replay_copy_settings()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/hdcp/
H A Dhdcp_msg.c353 (link->dpcd_caps.dongle_type == DISPLAY_DONGLE_DP_VGA_CONVERTER || in get_protection_properties_by_signal()
354 link->dpcd_caps.dongle_caps.dongle_type == DISPLAY_DONGLE_DP_VGA_CONVERTER)) { in get_protection_properties_by_signal()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/link/accessories/
H A Dlink_dp_cts.c820 if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_12) { in dp_set_test_pattern()
840 } else if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_10 || in dp_set_test_pattern()
841 link->dpcd_caps.dpcd_rev.raw == 0) { in dp_set_test_pattern()
904 link->dpcd_caps.dprx_feature.bits.SST_SPLIT_SDP_CAP); in dp_set_test_pattern()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_link_exports.c320 if (link->dpcd_caps.dongle_type >= DISPLAY_DONGLE_DP_DVI_DONGLE && in dc_link_get_highest_encoding_format()
321 link->dpcd_caps.dongle_type <= DISPLAY_DONGLE_DP_HDMI_MISMATCHED_DONGLE) in dc_link_get_highest_encoding_format()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/link/hwss/
H A Dlink_hwss_dio_fixed_vs_pe_retimer.c191 if (!link->dpcd_caps.lttpr_caps.main_link_channel_coding.bits.DP_128b_132b_SUPPORTED) in requires_fixed_vs_pe_retimer_dio_link_hwss()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc_types.h955 struct dpcd_caps *dpcd_caps; member

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