/openbmc/linux/drivers/gpu/drm/i915/display/ |
H A D | intel_dp_link_training.c | 62 enum drm_dp_phy dp_phy) in intel_dp_lttpr_phy_caps() argument 64 return intel_dp->lttpr_phy_caps[dp_phy - DP_PHY_LTTPR1]; in intel_dp_lttpr_phy_caps() 69 enum drm_dp_phy dp_phy) in intel_dp_read_lttpr_phy_caps() argument 71 u8 *phy_caps = intel_dp_lttpr_phy_caps(intel_dp, dp_phy); in intel_dp_read_lttpr_phy_caps() 73 if (drm_dp_read_lttpr_phy_caps(&intel_dp->aux, dpcd, dp_phy, phy_caps) < 0) { in intel_dp_read_lttpr_phy_caps() 74 lt_dbg(intel_dp, dp_phy, "failed to read the PHY caps\n"); in intel_dp_read_lttpr_phy_caps() 78 lt_dbg(intel_dp, dp_phy, "PHY capabilities: %*ph\n", in intel_dp_read_lttpr_phy_caps() 274 enum drm_dp_phy dp_phy) in intel_dp_lttpr_voltage_max() argument 276 const u8 *phy_caps = intel_dp_lttpr_phy_caps(intel_dp, dp_phy); in intel_dp_lttpr_voltage_max() 285 enum drm_dp_phy dp_phy) in intel_dp_lttpr_preemph_max() argument [all …]
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H A D | intel_dp_link_training.h | 18 enum drm_dp_phy dp_phy, 22 enum drm_dp_phy dp_phy, 26 enum drm_dp_phy dp_phy); 33 intel_dp_dump_link_status(struct intel_dp *intel_dp, enum drm_dp_phy dp_phy,
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/openbmc/linux/drivers/phy/mediatek/ |
H A D | phy-mtk-dp.c | 87 struct mtk_dp_phy *dp_phy = phy_get_drvdata(phy); in mtk_dp_phy_init() local 97 regmap_bulk_write(dp_phy->regs, MTK_DP_LANE0_DRIVING_PARAM_3, in mtk_dp_phy_init() 99 regmap_bulk_write(dp_phy->regs, MTK_DP_LANE1_DRIVING_PARAM_3, in mtk_dp_phy_init() 101 regmap_bulk_write(dp_phy->regs, MTK_DP_LANE2_DRIVING_PARAM_3, in mtk_dp_phy_init() 103 regmap_bulk_write(dp_phy->regs, MTK_DP_LANE3_DRIVING_PARAM_3, in mtk_dp_phy_init() 111 struct mtk_dp_phy *dp_phy = phy_get_drvdata(phy); in mtk_dp_phy_configure() local 134 regmap_write(dp_phy->regs, MTK_DP_PHY_DIG_BIT_RATE, val); in mtk_dp_phy_configure() 137 regmap_update_bits(dp_phy->regs, MTK_DP_PHY_DIG_PLL_CTL_1, in mtk_dp_phy_configure() 145 struct mtk_dp_phy *dp_phy = phy_get_drvdata(phy); in mtk_dp_phy_reset() local 147 regmap_update_bits(dp_phy->regs, MTK_DP_PHY_DIG_SW_RST, in mtk_dp_phy_reset() [all …]
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/openbmc/linux/include/drm/display/ |
H A D | drm_dp.h | 1389 #define DP_LTTPR_BASE(dp_phy) \ argument 1391 ((dp_phy) - DP_PHY_LTTPR1)) 1393 #define DP_LTTPR_REG(dp_phy, lttpr1_reg) \ argument 1394 (DP_LTTPR_BASE(dp_phy) - DP_LTTPR_BASE(DP_PHY_LTTPR1) + (lttpr1_reg)) 1397 #define DP_TRAINING_PATTERN_SET_PHY_REPEATER(dp_phy) \ argument 1398 DP_LTTPR_REG(dp_phy, DP_TRAINING_PATTERN_SET_PHY_REPEATER1) 1401 #define DP_TRAINING_LANE0_SET_PHY_REPEATER(dp_phy) \ argument 1402 DP_LTTPR_REG(dp_phy, DP_TRAINING_LANE0_SET_PHY_REPEATER1) 1408 #define DP_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER(dp_phy) \ argument 1409 DP_LTTPR_REG(dp_phy, DP_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1) [all …]
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H A D | drm_dp_helper.h | 48 enum drm_dp_phy dp_phy, bool uhbr); 50 enum drm_dp_phy dp_phy, bool uhbr); 72 const char *drm_dp_phy_name(enum drm_dp_phy dp_phy); 503 enum drm_dp_phy dp_phy, 560 enum drm_dp_phy dp_phy,
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/openbmc/linux/drivers/gpu/drm/display/ |
H A D | drm_dp_helper.c | 285 enum drm_dp_phy dp_phy, bool uhbr, bool cr) in __read_delay() argument 291 if (dp_phy == DP_PHY_DPRX) { in __read_delay() 312 offset = DP_128B132B_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER(dp_phy); in __read_delay() 319 offset = DP_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER(dp_phy); in __read_delay() 340 enum drm_dp_phy dp_phy, bool uhbr) in drm_dp_read_clock_recovery_delay() argument 342 return __read_delay(aux, dpcd, dp_phy, uhbr, true); in drm_dp_read_clock_recovery_delay() 347 enum drm_dp_phy dp_phy, bool uhbr) in drm_dp_read_channel_eq_delay() argument 349 return __read_delay(aux, dpcd, dp_phy, uhbr, false); in drm_dp_read_channel_eq_delay() 416 const char *drm_dp_phy_name(enum drm_dp_phy dp_phy) in drm_dp_phy_name() argument 430 if (dp_phy < 0 || dp_phy >= ARRAY_SIZE(phy_names) || in drm_dp_phy_name() [all …]
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/openbmc/linux/Documentation/devicetree/bindings/display/exynos/ |
H A D | exynos_dp.txt | 84 phys = <&dp_phy>;
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/openbmc/linux/drivers/phy/qualcomm/ |
H A D | phy-qcom-qmp-combo.c | 1418 struct phy *dp_phy; member 3407 return qmp->dp_phy; in qmp_combo_phy_xlate() 3493 qmp->dp_phy = devm_phy_create(dev, dp_np, &qmp_combo_dp_phy_ops); in qmp_combo_probe() 3494 if (IS_ERR(qmp->dp_phy)) { in qmp_combo_probe() 3495 ret = PTR_ERR(qmp->dp_phy); in qmp_combo_probe() 3500 phy_set_drvdata(qmp->dp_phy, qmp); in qmp_combo_probe()
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/openbmc/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos5250.dtsi | 298 dp_phy: dp-phy { label 1123 phys = <&dp_phy>;
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H A D | exynos5420.dtsi | 930 dp_phy: dp-phy { label 1210 phys = <&dp_phy>;
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/openbmc/linux/arch/arm64/boot/dts/qcom/ |
H A D | sm8250.dtsi | 3594 dp_phy: dp-phy@88ea200 { label 4567 <&dp_phy 0>, 4568 <&dp_phy 1>;
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