| /openbmc/linux/drivers/memory/samsung/ |
| H A D | exynos5422-dmc.c | 238 static int exynos5_counters_set_event(struct exynos5_dmc *dmc) in exynos5_counters_set_event() argument
242 for (i = 0; i < dmc->num_counters; i++) { in exynos5_counters_set_event()
243 if (!dmc->counter[i]) in exynos5_counters_set_event()
245 ret = devfreq_event_set_event(dmc->counter[i]); in exynos5_counters_set_event()
252 static int exynos5_counters_enable_edev(struct exynos5_dmc *dmc) in exynos5_counters_enable_edev() argument
256 for (i = 0; i < dmc->num_counters; i++) { in exynos5_counters_enable_edev()
257 if (!dmc->counter[i]) in exynos5_counters_enable_edev()
259 ret = devfreq_event_enable_edev(dmc->counter[i]); in exynos5_counters_enable_edev()
266 static int exynos5_counters_disable_edev(struct exynos5_dmc *dmc) in exynos5_counters_disable_edev() argument
270 for (i = 0; i < dmc->num_counters; i++) { in exynos5_counters_disable_edev()
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| H A D | Makefile | 2 obj-$(CONFIG_EXYNOS5422_DMC) += exynos5422-dmc.o
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| /openbmc/u-boot/arch/arm/mach-exynos/ |
| H A D | dmc_init_exynos4.c | 51 static void phy_control_reset(int ctrl_no, struct exynos4_dmc *dmc) in phy_control_reset() argument
55 &dmc->phycontrol1); in phy_control_reset()
57 &dmc->phycontrol1); in phy_control_reset()
60 &dmc->phycontrol0); in phy_control_reset()
62 &dmc->phycontrol0); in phy_control_reset()
66 static void dmc_config_mrs(struct exynos4_dmc *dmc, int chip) in dmc_config_mrs() argument
76 &dmc->directcmd); in dmc_config_mrs()
80 static void dmc_init(struct exynos4_dmc *dmc) in dmc_init() argument
87 writel(mem.control1, &dmc->phycontrol1); in dmc_init()
94 writel(mem.zqcontrol, &dmc->phyzqcontrol); in dmc_init()
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| H A D | dmc_init_ddr3.c | 39 struct exynos5_dmc *dmc; in ddr3_mem_ctrl_init() local
45 dmc = (struct exynos5_dmc *)samsung_get_base_dmc_ctrl(); in ddr3_mem_ctrl_init()
75 &dmc->concontrol); in ddr3_mem_ctrl_init()
77 update_reset_dll(&dmc->phycontrol0, DDR_MODE_DDR3); in ddr3_mem_ctrl_init()
102 update_reset_dll(&dmc->phycontrol0, DDR_MODE_DDR3); in ddr3_mem_ctrl_init()
105 &dmc->concontrol); in ddr3_mem_ctrl_init()
108 writel(mem->iv_size, &dmc->ivcontrol); in ddr3_mem_ctrl_init()
110 writel(mem->memconfig, &dmc->memconfig0); in ddr3_mem_ctrl_init()
111 writel(mem->memconfig, &dmc->memconfig1); in ddr3_mem_ctrl_init()
112 writel(mem->membaseconfig0, &dmc->membaseconfig0); in ddr3_mem_ctrl_init()
[all …]
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| /openbmc/linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_dmc.c | 71 return i915->display.dmc.dmc; in i915_to_dmc()
298 struct intel_dmc *dmc = i915_to_dmc(i915); in has_dmc_id_fw() local
300 return dmc && dmc->dmc_info[dmc_id].payload; in has_dmc_id_fw()
521 struct intel_dmc *dmc, in dmc_mmiodata() argument
525 dmc->dmc_info[dmc_id].mmioaddr[i], in dmc_mmiodata()
526 dmc->dmc_info[dmc_id].mmiodata[i])) in dmc_mmiodata()
532 return dmc->dmc_info[dmc_id].mmiodata[i]; in dmc_mmiodata()
546 struct intel_dmc *dmc = i915_to_dmc(i915); in intel_dmc_load_program() local
562 for (i = 0; i < dmc->dmc_info[dmc_id].dmc_fw_size; i++) { in intel_dmc_load_program()
564 DMC_PROGRAM(dmc->dmc_info[dmc_id].start_mmioaddr, i), in intel_dmc_load_program()
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| H A D | intel_display_core.h | 365 struct intel_dmc *dmc; member
367 } dmc; member
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| /openbmc/u-boot/doc/device-tree-bindings/clock/ |
| H A D | rockchip,rk3368-dmc.txt | 15 - compatible: "rockchip,rk3368-dmc"
54 #include <dt-bindings/memory/rk3368-dmc.h>
56 dmc: dmc@ff610000 {
58 compatible = "rockchip,rk3368-dmc";
63 &dmc {
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| H A D | rockchip,rk3399-dmc.txt | 3 - compatible: "rockchip,rk3399-dmc", "syscon"
18 dmc: dmc {
20 compatible = "rockchip,rk3399-dmc";
35 &dmc {
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| H A D | rockchip,rk3288-dmc.txt | 3 - compatible: "rockchip,rk3288-dmc", "syscon"
18 -logic-supply: this driver should adjust VDD_LOGIC according to dmc frequency, so need get logic-su…
113 dmc: dmc@ff610000 {
114 compatible = "rockchip,rk3288-dmc", "syscon";
132 &dmc {
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| /openbmc/openbmc/meta-openembedded/meta-oe/recipes-graphics/tslib/ |
| H A D | tslib_1.23.bb | 44 PACKAGECONFIG[dmc] = "--enable-dmc,--disable-dmc"
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | rk3368-lion-u-boot.dtsi | 28 &dmc {
41 * See doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt for
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| H A D | rk3368-geekbox-u-boot.dtsi | 14 &dmc {
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| H A D | rk3368-px5-evb-u-boot.dtsi | 14 &dmc {
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| H A D | rk3368-sheep-u-boot.dtsi | 14 &dmc {
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| H A D | rk3288-veyron-speedy-u-boot.dtsi | 6 &dmc {
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| H A D | rk3288-vyasa-u-boot.dtsi | 6 &dmc {
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| H A D | rk3288-miqi.dts | 18 &dmc {
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| H A D | rk3288-evb.dts | 18 &dmc {
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| H A D | rk3288-popmetal.dts | 18 &dmc {
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| H A D | rk3288-fennec.dts | 18 &dmc {
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| H A D | rk3288-tinker.dts | 18 &dmc {
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| H A D | rk3xxx.dtsi | 229 dmc: dmc@20020000 { label
231 compatible = "rockchip,rk3188-dmc", "syscon";
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| H A D | rk3288-firefly.dts | 23 &dmc {
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| /openbmc/u-boot/drivers/ram/rockchip/ |
| H A D | Makefile | 6 obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o
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| /openbmc/linux/arch/arm/boot/dts/samsung/ |
| H A D | s5pv210.dtsi | 498 dmc0: dmc@f0000000 {
499 compatible = "samsung,s5pv210-dmc";
503 dmc1: dmc@f1400000 {
504 compatible = "samsung,s5pv210-dmc";
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