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Searched refs:div_fsys3 (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/arch/arm/mach-exynos/
H A Dclock_init_exynos4.c71 writel(CLK_DIV_FSYS3_VAL, &clk->div_fsys3); in system_clock_init()
H A Dclock.c815 ratio = readl(&clk->div_fsys3); in exynos4_get_mmc_clk()
816 pre_ratio = readl(&clk->div_fsys3); in exynos4_get_mmc_clk()
852 addr = (unsigned int)&clk->div_fsys3; in exynos4_set_mmc_clk()
/openbmc/u-boot/arch/arm/mach-exynos/include/mach/
H A Dclock.h97 unsigned int div_fsys3; member
334 unsigned int div_fsys3; member
/openbmc/u-boot/board/samsung/odroid/
H A Dodroid.c359 clrsetbits_le32(&clk->div_fsys3, clr, set); in board_clock_init()
/openbmc/u-boot/board/samsung/trats/
H A Dtrats.c331 writel(CLK_DIV_FSYS3_VAL, (unsigned int)&clk->div_fsys3); in board_clock_init()