Searched refs:div_fsys2 (Results 1 – 6 of 6) sorted by relevance
96 unsigned int div_fsys2; member333 unsigned int div_fsys2; member724 unsigned int div_fsys2; member1132 unsigned int div_fsys2; member
70 writel(CLK_DIV_FSYS2_VAL, &clk->div_fsys2); in system_clock_init()
413 div = sub_div = readl(&clk->div_fsys2); in exynos5_get_periph_rate()811 ratio = readl(&clk->div_fsys2); in exynos4_get_mmc_clk()812 pre_ratio = readl(&clk->div_fsys2); in exynos4_get_mmc_clk()858 addr = (unsigned int)&clk->div_fsys2; in exynos4_set_mmc_clk()883 addr = (unsigned int)&clk->div_fsys2; in exynos5_set_mmc_clk()
779 writel(val, &clk->div_fsys2); in exynos5250_system_clock_init()943 writel(CLK_DIV_FSYS2_VAL, &clk->div_fsys2); in exynos5420_system_clock_init()
343 clrsetbits_le32(&clk->div_fsys2, clr, set); in board_clock_init()
330 writel(CLK_DIV_FSYS2_VAL, (unsigned int)&clk->div_fsys2); in board_clock_init()