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Searched refs:div_dmc0 (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/arm/mach-exynos/
H A Dclock_init_exynos4.c64 writel(CLK_DIV_DMC0_VAL, &clk->div_dmc0); in system_clock_init()
/openbmc/u-boot/board/samsung/trats/
H A Dtrats.c87 writel(0x13113117, &clk->div_dmc0); in trats_low_power_mode()
324 writel(CLK_DIV_DMC0_VAL, (unsigned int)&clk->div_dmc0); in board_clock_init()
/openbmc/u-boot/arch/arm/mach-exynos/include/mach/
H A Dclock.h156 unsigned int div_dmc0; member
400 unsigned int div_dmc0; member
/openbmc/u-boot/board/samsung/odroid/
H A Dodroid.c248 clrsetbits_le32(&clk->div_dmc0, clr, set); in board_clock_init()