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Searched refs:div_cpu0 (Results 1 – 6 of 6) sorted by relevance

/openbmc/u-boot/arch/arm/mach-exynos/include/mach/
H A Dclock.h195 unsigned int div_cpu0; member
445 unsigned int div_cpu0; member
525 unsigned int div_cpu0; member
870 unsigned int div_cpu0; /* 0x10010500 */ member
/openbmc/u-boot/arch/arm/mach-exynos/
H A Dclock_init_exynos4.c62 writel(CLK_DIV_CPU0_VAL, &clk->div_cpu0); in system_clock_init()
H A Dclock.c578 div = readl(&clk->div_cpu0); in exynos4_get_arm_clk()
600 div = readl(&clk->div_cpu0); in exynos4x12_get_arm_clk()
622 div = readl(&clk->div_cpu0); in exynos5_get_arm_clk()
H A Dclock_init_exynos5.c607 writel(val, &clk->div_cpu0); in exynos5250_system_clock_init()
813 writel(CLK_DIV_CPU0_VAL, &clk->div_cpu0); in exynos5420_system_clock_init()
/openbmc/u-boot/board/samsung/trats/
H A Dtrats.c76 writel(0x00000100, &clk->div_cpu0); in trats_low_power_mode()
322 writel(CLK_DIV_CPU0_VAL, (unsigned int)&clk->div_cpu0); in board_clock_init()
/openbmc/u-boot/board/samsung/odroid/
H A Dodroid.c163 clrsetbits_le32(&clk->div_cpu0, clr, set); in board_clock_init()