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Searched refs:dfimisc (Results 1 – 7 of 7) sorted by relevance

/openbmc/u-boot/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.c341 clrbits_le32(&ctl->dfimisc, DDRCTRL_DFIMISC_DFI_INIT_COMPLETE_EN); in stm32mp1_refresh_disable()
353 setbits_le32(&ctl->dfimisc, DDRCTRL_DFIMISC_DFI_INIT_COMPLETE_EN); in stm32mp1_refresh_restore()
412 clrbits_le32(&priv->ctl->dfimisc, DDRCTRL_DFIMISC_DFI_INIT_COMPLETE_EN); in stm32mp1_ddr_init()
414 (u32)&priv->ctl->dfimisc, readl(&priv->ctl->dfimisc)); in stm32mp1_ddr_init()
459 setbits_le32(&priv->ctl->dfimisc, DDRCTRL_DFIMISC_DFI_INIT_COMPLETE_EN); in stm32mp1_ddr_init()
H A Dstm32mp1_ddr_regs.h71 u32 dfimisc; /* 0x1b0 DFI Miscellaneous Control*/ member
/openbmc/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun9i.c586 clrbits_le32(&mctl_ctl->dfimisc, MCTL_DFIMISC_DFI_INIT_COMPLETE_EN); in mctl_channel_init()
617 setbits_le32(&mctl_ctl->dfimisc, MCTL_DFIMISC_DFI_INIT_COMPLETE_EN); in mctl_channel_init()
813 debug("DFIMISC before writing 0: 0x%x\n", readl(&mctl_ctl->dfimisc)); in mctl_channel_init()
814 writel(0, &mctl_ctl->dfimisc); in mctl_channel_init()
H A Ddram_sun50i_h6.c261 writel(0, &mctl_ctl->dfimisc); in mctl_set_timing_lpddr3()
539 setbits_le32(&mctl_ctl->dfimisc, BIT(0)); in mctl_channel_init()
667 clrbits_le32(&mctl_ctl->dfimisc, BIT(0)); in mctl_channel_init()
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Ddram_sun50i_h6.h100 u32 dfimisc; /* 0x1b0 */ member
H A Ddram_sun9i.h71 u32 dfimisc; /* 0x1b0 DFI miscellaneous control register */ member
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dddr.h166 u32 dfimisc; member