Searched refs:delay_val (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/drivers/net/ethernet/stmicro/stmmac/ |
| H A D | dwmac-mediatek.c | 195 u32 delay_val = 0, fine_val = 0; in mt2712_set_delay() local
201 delay_val |= FIELD_PREP(ETH_DLY_TXC_ENABLE, !!mac_delay->tx_delay); in mt2712_set_delay()
202 delay_val |= FIELD_PREP(ETH_DLY_TXC_STAGES, mac_delay->tx_delay); in mt2712_set_delay()
203 delay_val |= FIELD_PREP(ETH_DLY_TXC_INV, mac_delay->tx_inv); in mt2712_set_delay()
205 delay_val |= FIELD_PREP(ETH_DLY_RXC_ENABLE, !!mac_delay->rx_delay); in mt2712_set_delay()
206 delay_val |= FIELD_PREP(ETH_DLY_RXC_STAGES, mac_delay->rx_delay); in mt2712_set_delay()
207 delay_val |= FIELD_PREP(ETH_DLY_RXC_INV, mac_delay->rx_inv); in mt2712_set_delay()
216 delay_val |= FIELD_PREP(ETH_DLY_TXC_ENABLE, !!mac_delay->rx_delay); in mt2712_set_delay()
217 delay_val |= FIELD_PREP(ETH_DLY_TXC_STAGES, mac_delay->rx_delay); in mt2712_set_delay()
218 delay_val |= FIELD_PREP(ETH_DLY_TXC_INV, mac_delay->rx_inv); in mt2712_set_delay()
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| /openbmc/u-boot/drivers/video/exynos/ |
| H A D | exynos_mipi_dsi_common.c | 100 unsigned long delay_val, delay; in exynos_mipi_dsi_wr_data() local
109 delay_val = MHZ / dsim->dsim_config->esc_clk; in exynos_mipi_dsi_wr_data()
110 delay = 10 * delay_val; in exynos_mipi_dsi_wr_data()
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| /openbmc/linux/drivers/net/ethernet/mediatek/ |
| H A D | mtk_star_emac.c | 1507 unsigned int delay_val = 0; in mtk_star_set_timing() local
1512 delay_val |= FIELD_PREP(MTK_STAR_BIT_INV_RX_CLK, priv->rx_inv); in mtk_star_set_timing()
1513 delay_val |= FIELD_PREP(MTK_STAR_BIT_INV_TX_CLK, priv->tx_inv); in mtk_star_set_timing()
1520 return regmap_write(priv->regs, MTK_STAR_REG_TEST0, delay_val); in mtk_star_set_timing()
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