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Searched refs:ddrclkdr (Results 1 – 7 of 7) sorted by relevance

/openbmc/u-boot/board/varisys/cyrus/
H A Dcyrus.c46 setbits_be32(&gur->ddrclkdr, 0x001B001B); in board_early_init_f()
/openbmc/u-boot/board/freescale/corenet_ds/
H A Dcorenet_ds.c94 setbits_be32(&gur->ddrclkdr, 0x001B001B); in board_early_init_f()
/openbmc/u-boot/board/freescale/p2041rdb/
H A Dp2041rdb.c66 setbits_be32(&gur->ddrclkdr, 0x000f000f); in board_early_init_f()
/openbmc/u-boot/board/keymile/kmp204x/
H A Dkmp204x.c94 setbits_be32(&gur->ddrclkdr, 0x001f000f); in board_early_init_f()
/openbmc/linux/include/linux/fsl/
H A Dguts.h112 u32 ddrclkdr; /* 0x.0b28 - DDR Clock Disable Register */ member
/openbmc/u-boot/arch/arm/include/asm/arch-ls102xa/
H A Dimmap_ls102xa.h145 u32 ddrclkdr; member
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dimmap_85xx.h1959 u32 ddrclkdr; /* DDR clock disable */ member