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Searched refs:ddr_ctrl (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/memory/
H A Dbrcmstb_memc.c30 void __iomem *ddr_ctrl; member
38 void __iomem *config = memc->ddr_ctrl + REG_MEMC_CNTRLR_CONFIG; in brcmstb_memc_uses_lpddr4()
49 void __iomem *cfg = memc->ddr_ctrl + memc->srpd_offset; in brcmstb_memc_srpd_config()
144 memc->ddr_ctrl = devm_platform_ioremap_resource(pdev, 0); in brcmstb_memc_probe()
145 if (IS_ERR(memc->ddr_ctrl)) in brcmstb_memc_probe()
146 return PTR_ERR(memc->ddr_ctrl); in brcmstb_memc_probe()
255 void __iomem *cfg = memc->ddr_ctrl + memc->srpd_offset; in brcmstb_memc_suspend()
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dqca,ath79-cpu-intc.txt35 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
36 <&ddr_ctrl 0>, <&ddr_ctrl 1>;
41 ddr_ctrl: memory-controller@18000000 {
/openbmc/u-boot/arch/arm/mach-omap2/am33xx/
H A Demif4.c23 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR;
26 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR;
/openbmc/linux/arch/mips/boot/dts/qca/
H A Dar9132.dtsi29 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
30 <&ddr_ctrl 0>, <&ddr_ctrl 1>;
51 ddr_ctrl: memory-controller@18000000 { label
H A Dar9331.dtsi29 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>;
55 ddr_ctrl: memory-controller@18000000 { label
/openbmc/u-boot/arch/arm/include/asm/arch-am33xx/
H A Dddr_defs.h350 struct ddr_ctrl { struct