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Searched refs:data_value (Results 1 – 12 of 12) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_training.c340 u32 data_value = 0, cs_cnt = 0, in hws_ddr3_tip_init_controller() local
392 data_value = (0x4000 | 0 | 0x1000000) & ~(1 << 26); in hws_ddr3_tip_init_controller()
394 data_value = (0x4000 | 0x8000 | 0x1000000) & ~(1 << 26); in hws_ddr3_tip_init_controller()
400 SDRAM_CFG_REG, data_value, in hws_ddr3_tip_init_controller()
460 data_value = 0x7; in hws_ddr3_tip_init_controller()
472 data_value = in hws_ddr3_tip_init_controller()
524 data_value = in hws_ddr3_tip_init_controller()
529 MR0_REG, data_value, in hws_ddr3_tip_init_controller()
551 data_value = (cwl_mask_table[cwl_val] << 3); in hws_ddr3_tip_init_controller()
552 data_value |= in hws_ddr3_tip_init_controller()
[all …]
H A Dddr3_training_ip_flow.h68 u32 if_id, u32 reg_addr, u32 data_value, u32 mask);
78 u32 reg_addr, u32 data_value, u32 reg_mask);
85 u32 data_value);
H A Dddr3_debug.c113 u32 if_id, reg_addr, data_value, bus_id; in ddr3_tip_reg_dump() local
145 &data_value)); in ddr3_tip_reg_dump()
146 printf("0x%x ", data_value); in ddr3_tip_reg_dump()
156 &data_value)); in ddr3_tip_reg_dump()
157 printf("0x%x ", data_value); in ddr3_tip_reg_dump()
675 u32 data_value; in ddr3_tip_read_adll_value() local
693 &data_value)); in ddr3_tip_read_adll_value()
696 data_value & mask; in ddr3_tip_read_adll_value()
744 u32 data_value; in read_phase_value() local
758 &data_value)); in read_phase_value()
[all …]
H A Dddr3_training_pbs.c942 u32 data_value = 0, bit = 0, if_id = 0, pup = 0; in ddr3_tip_print_pbs_result() local
975 &data_value)); in ddr3_tip_print_pbs_result()
976 printf("%d , ", data_value); in ddr3_tip_print_pbs_result()
H A Dddr3_training_ip_engine.c631 u32 data_value = 0; in ddr3_tip_configure_odpg() local
634 data_value = ((single_pattern << 2) | (tx_phases << 5) | in ddr3_tip_configure_odpg()
639 ODPG_DATA_CTRL_REG, data_value, 0xaffffffc); in ddr3_tip_configure_odpg()
/openbmc/linux/drivers/gpu/drm/gma500/
H A Dpsb_intel_sdvo.c2228 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2231 psb_intel_sdvo_connector->max_##name = data_value[0]; \
2234 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2240 data_value[0], data_value[1], response); \
2251 uint16_t response, data_value[2]; in psb_intel_sdvo_create_enhance_property_tv() local
2257 &data_value, 4)) in psb_intel_sdvo_create_enhance_property_tv()
2265 psb_intel_sdvo_connector->max_hscan = data_value[0]; in psb_intel_sdvo_create_enhance_property_tv()
2266 psb_intel_sdvo_connector->left_margin = data_value[0] - response; in psb_intel_sdvo_create_enhance_property_tv()
2269 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]); in psb_intel_sdvo_create_enhance_property_tv()
2278 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]); in psb_intel_sdvo_create_enhance_property_tv()
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/openbmc/qemu/hw/gpio/
H A Daspeed_gpio.c268 uint32_t gpio_curr_high = extract32(regs->data_value, gpio, 1); in aspeed_evaluate_irq()
307 uint32_t old = regs->data_value; in aspeed_gpio_update()
330 regs->data_value |= mask; in aspeed_gpio_update()
332 regs->data_value &= ~mask; in aspeed_gpio_update()
358 reg_val = s->sets[set_idx].data_value; in aspeed_gpio_get_pin_level()
366 uint32_t value = s->sets[set_idx].data_value; in aspeed_gpio_set_pin_level()
611 value = set->data_value; in aspeed_gpio_read()
692 reg_value = update_value_control_source(set, set->data_value, in aspeed_gpio_write_index_mode()
802 aspeed_gpio_update(s, set, set->data_value, UINT32_MAX); in aspeed_gpio_write_index_mode()
852 data = update_value_control_source(set, set->data_value, data); in aspeed_gpio_write()
[all …]
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_sdvo.c3083 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
3087 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
3093 data_value[0], data_value[1], response); \
3109 u16 response, data_value[2]; in intel_sdvo_create_enhance_property_tv() local
3115 &data_value, 4)) in intel_sdvo_create_enhance_property_tv()
3125 intel_sdvo_connector->max_hscan = data_value[0]; in intel_sdvo_create_enhance_property_tv()
3127 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]); in intel_sdvo_create_enhance_property_tv()
3135 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]); in intel_sdvo_create_enhance_property_tv()
3143 data_value[0], data_value[1], response); in intel_sdvo_create_enhance_property_tv()
3149 &data_value, 4)) in intel_sdvo_create_enhance_property_tv()
[all …]
/openbmc/qemu/include/hw/gpio/
H A Daspeed_gpio.h96 uint32_t data_value; /* Reflects pin values */ member
/openbmc/linux/drivers/thunderbolt/
H A Ddma_test.c710 u64 data_value = DMA_TEST_DATA_PATTERN; in dma_test_init() local
717 for (i = 0; i < DMA_TEST_FRAME_SIZE / sizeof(data_value); i++) in dma_test_init()
718 ((u32 *)dma_test_pattern)[i] = data_value++; in dma_test_init()
/openbmc/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_82599.c104 u16 list_offset, data_offset, data_value; in ixgbe_setup_sfp_modules_82599() local
122 if (hw->eeprom.ops.read(hw, ++data_offset, &data_value)) in ixgbe_setup_sfp_modules_82599()
124 while (data_value != 0xffff) { in ixgbe_setup_sfp_modules_82599()
125 IXGBE_WRITE_REG(hw, IXGBE_CORECTL, data_value); in ixgbe_setup_sfp_modules_82599()
127 if (hw->eeprom.ops.read(hw, ++data_offset, &data_value)) in ixgbe_setup_sfp_modules_82599()
/openbmc/linux/arch/ia64/include/asm/
H A Dpal.h975 ia64_pal_cache_line_init (u64 physical_addr, u64 data_value) in ia64_pal_cache_line_init() argument
978 PAL_CALL(iprv, PAL_CACHE_LINE_INIT, physical_addr, data_value, 0); in ia64_pal_cache_line_init()