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Searched refs:d1vga_control (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/radeon/
H A Dradeon_bios.c263 u32 d1vga_control; in ni_read_disabled_bios() local
270 d1vga_control = RREG32(AVIVO_D1VGA_CONTROL); in ni_read_disabled_bios()
280 (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | in ni_read_disabled_bios()
295 WREG32(AVIVO_D1VGA_CONTROL, d1vga_control); in ni_read_disabled_bios()
307 uint32_t d1vga_control; in r700_read_disabled_bios() local
317 d1vga_control = RREG32(AVIVO_D1VGA_CONTROL); in r700_read_disabled_bios()
328 (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | in r700_read_disabled_bios()
365 WREG32(AVIVO_D1VGA_CONTROL, d1vga_control); in r700_read_disabled_bios()
376 uint32_t d1vga_control; in r600_read_disabled_bios() local
390 d1vga_control = RREG32(AVIVO_D1VGA_CONTROL); in r600_read_disabled_bios()
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/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dcik.c970 u32 d1vga_control = 0; in cik_read_disabled_bios() local
978 d1vga_control = RREG32(mmD1VGA_CONTROL); in cik_read_disabled_bios()
989 (d1vga_control & ~(D1VGA_CONTROL__D1VGA_MODE_ENABLE_MASK | in cik_read_disabled_bios()
1004 WREG32(mmD1VGA_CONTROL, d1vga_control); in cik_read_disabled_bios()
H A Dvi.c593 u32 d1vga_control = 0; in vi_read_disabled_bios() local
601 d1vga_control = RREG32(mmD1VGA_CONTROL); in vi_read_disabled_bios()
612 (d1vga_control & ~(D1VGA_CONTROL__D1VGA_MODE_ENABLE_MASK | in vi_read_disabled_bios()
627 WREG32(mmD1VGA_CONTROL, d1vga_control); in vi_read_disabled_bios()
H A Dgmc_v6_0.c791 u32 d1vga_control = RREG32(mmD1VGA_CONTROL); in gmc_v6_0_get_vbios_fb_size() local
794 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v6_0_get_vbios_fb_size()
H A Dsi.c1261 u32 d1vga_control = 0; in si_read_disabled_bios() local
1269 d1vga_control = RREG32(AVIVO_D1VGA_CONTROL); in si_read_disabled_bios()
1280 (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | in si_read_disabled_bios()
1295 WREG32(AVIVO_D1VGA_CONTROL, d1vga_control); in si_read_disabled_bios()
H A Dgmc_v11_0.c552 u32 d1vga_control = RREG32_SOC15(DCE, 0, regD1VGA_CONTROL); in gmc_v11_0_get_vbios_fb_size() local
555 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v11_0_get_vbios_fb_size()
H A Dgmc_v10_0.c644 u32 d1vga_control = RREG32_SOC15(DCE, 0, mmD1VGA_CONTROL); in gmc_v10_0_get_vbios_fb_size() local
647 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v10_0_get_vbios_fb_size()
H A Dgmc_v7_0.c961 u32 d1vga_control = RREG32(mmD1VGA_CONTROL); in gmc_v7_0_get_vbios_fb_size() local
964 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v7_0_get_vbios_fb_size()
H A Dgmc_v8_0.c1067 u32 d1vga_control = RREG32(mmD1VGA_CONTROL); in gmc_v8_0_get_vbios_fb_size() local
1070 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v8_0_get_vbios_fb_size()
H A Dgmc_v9_0.c1376 u32 d1vga_control = RREG32_SOC15(DCE, 0, mmD1VGA_CONTROL); in gmc_v9_0_get_vbios_fb_size() local
1381 if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) { in gmc_v9_0_get_vbios_fb_size()