Searched refs:ctrlreg1 (Results 1 – 2 of 2) sorted by relevance
224 u32 ctrlreg1; in spear_smi_read_sr() local229 ctrlreg1 = readl(dev->io_base + SMI_CR1); in spear_smi_read_sr()231 writel(ctrlreg1 & ~(SW_MODE | WB_MODE), dev->io_base + SMI_CR1); in spear_smi_read_sr()248 writel(ctrlreg1, dev->io_base + SMI_CR1); in spear_smi_read_sr()382 u32 ctrlreg1; in spear_smi_write_enable() local387 ctrlreg1 = readl(dev->io_base + SMI_CR1); in spear_smi_write_enable()389 writel(ctrlreg1 & ~SW_MODE, dev->io_base + SMI_CR1); in spear_smi_write_enable()398 writel(ctrlreg1, dev->io_base + SMI_CR1); in spear_smi_write_enable()447 u32 ctrlreg1 = 0; in spear_smi_erase_sector() local460 ctrlreg1 = readl(dev->io_base + SMI_CR1); in spear_smi_erase_sector()[all …]
174 u32 ctrlreg1, val; in smi_read_sr() local177 ctrlreg1 = readl(&smicntl->smi_cr1); in smi_read_sr()192 writel(ctrlreg1, &smicntl->smi_cr1); in smi_read_sr()235 u32 ctrlreg1; in smi_write_enable() local241 ctrlreg1 = readl(&smicntl->smi_cr1); in smi_write_enable()253 writel(ctrlreg1, &smicntl->smi_cr1); in smi_write_enable()