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Searched refs:cpuinfo (Results 1 – 25 of 196) sorted by relevance

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/openbmc/linux/arch/nios2/kernel/
H A Dcpuinfo.c17 struct cpuinfo cpuinfo; variable
46 cpuinfo.cpu_clock_freq = fcpu(cpu, "clock-frequency"); in setup_cpuinfo()
50 strscpy(cpuinfo.cpu_impl, str, sizeof(cpuinfo.cpu_impl)); in setup_cpuinfo()
52 strcpy(cpuinfo.cpu_impl, "<unknown>"); in setup_cpuinfo()
54 cpuinfo.has_div = of_property_read_bool(cpu, "altr,has-div"); in setup_cpuinfo()
55 cpuinfo.has_mul = of_property_read_bool(cpu, "altr,has-mul"); in setup_cpuinfo()
56 cpuinfo.has_mulx = of_property_read_bool(cpu, "altr,has-mulx"); in setup_cpuinfo()
57 cpuinfo.has_bmx = of_property_read_bool(cpu, "altr,has-bmx"); in setup_cpuinfo()
58 cpuinfo.has_cdx = of_property_read_bool(cpu, "altr,has-cdx"); in setup_cpuinfo()
59 cpuinfo.mmu = of_property_read_bool(cpu, "altr,has-mmu"); in setup_cpuinfo()
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/openbmc/linux/arch/microblaze/kernel/cpu/
H A Dmb.c36 if (cpuinfo.fpga_family_code == family_string_lookup[i].k) { in show_cpuinfo()
44 if (cpuinfo.ver_code == cpu_ver_lookup[i].k) { in show_cpuinfo()
58 cpuinfo.endian ? "little" : "big", in show_cpuinfo()
59 cpuinfo.cpu_clock_freq / 1000000, in show_cpuinfo()
60 cpuinfo.cpu_clock_freq % 1000000, in show_cpuinfo()
69 (cpuinfo.use_instr & PVR0_USE_BARREL_MASK) ? "yes" : "no", in show_cpuinfo()
70 (cpuinfo.use_instr & PVR2_USE_MSR_INSTR) ? "yes" : "no", in show_cpuinfo()
71 (cpuinfo.use_instr & PVR2_USE_PCMP_INSTR) ? "yes" : "no", in show_cpuinfo()
72 (cpuinfo.use_instr & PVR0_USE_DIV_MASK) ? "yes" : "no"); in show_cpuinfo()
74 seq_printf(m, " MMU:\t\t%x\n", cpuinfo.mmu); in show_cpuinfo()
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H A Dcache.c169 cpuinfo.icache_line_length, cpuinfo.icache_size); in __flush_icache_range_msr_irq()
175 CACHE_RANGE_LOOP_1(start, end, cpuinfo.icache_line_length, wic); in __flush_icache_range_msr_irq()
177 for (i = start; i < end; i += cpuinfo.icache_line_length) in __flush_icache_range_msr_irq()
196 cpuinfo.icache_line_length, cpuinfo.icache_size); in __flush_icache_range_nomsr_irq()
202 CACHE_RANGE_LOOP_1(start, end, cpuinfo.icache_line_length, wic); in __flush_icache_range_nomsr_irq()
204 for (i = start; i < end; i += cpuinfo.icache_line_length) in __flush_icache_range_nomsr_irq()
223 cpuinfo.icache_line_length, cpuinfo.icache_size); in __flush_icache_range_noirq()
225 CACHE_RANGE_LOOP_1(start, end, cpuinfo.icache_line_length, wic); in __flush_icache_range_noirq()
227 for (i = start; i < end; i += cpuinfo.icache_line_length) in __flush_icache_range_noirq()
244 CACHE_ALL_LOOP(cpuinfo.icache_size, cpuinfo.icache_line_length, wic); in __flush_icache_all_msr_irq()
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H A Dcpuinfo.c88 struct cpuinfo cpuinfo; variable
103 set_cpuinfo_static(&cpuinfo, cpu); in setup_cpuinfo()
110 set_cpuinfo_static(&cpuinfo, cpu); in setup_cpuinfo()
111 set_cpuinfo_pvr_full(&cpuinfo, cpu); in setup_cpuinfo()
115 set_cpuinfo_static(&cpuinfo, cpu); in setup_cpuinfo()
118 if (cpuinfo.mmu_privins) in setup_cpuinfo()
133 cpuinfo.cpu_clock_freq = fcpu(cpu, "timebase-frequency"); in setup_cpuinfo_clk()
135 cpuinfo.cpu_clock_freq = clk_get_rate(clk); in setup_cpuinfo_clk()
138 if (!cpuinfo.cpu_clock_freq) { in setup_cpuinfo_clk()
H A DMakefile13 obj-y += cache.o cpuinfo.o cpuinfo-pvr-full.o cpuinfo-static.o mb.o pvr.o
/openbmc/linux/tools/testing/selftests/arm64/abi/
H A Dhwcap.c296 const char *cpuinfo; member
306 .cpuinfo = "aes",
313 .cpuinfo = "crc32",
320 .cpuinfo = "cssc",
327 .cpuinfo = "fp",
334 .cpuinfo = "jscvt",
341 .cpuinfo = "lrcpc",
348 .cpuinfo = "ilrcpc",
355 .cpuinfo = "atomics",
362 .cpuinfo = "uscat",
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/openbmc/qemu/tcg/riscv/
H A Dtcg-target.h76 #define TCG_TARGET_HAS_rot_i32 (cpuinfo & CPUINFO_ZBB)
91 #define TCG_TARGET_HAS_bswap16_i32 (cpuinfo & CPUINFO_ZBB)
92 #define TCG_TARGET_HAS_bswap32_i32 (cpuinfo & CPUINFO_ZBB)
94 #define TCG_TARGET_HAS_andc_i32 (cpuinfo & CPUINFO_ZBB)
95 #define TCG_TARGET_HAS_orc_i32 (cpuinfo & CPUINFO_ZBB)
96 #define TCG_TARGET_HAS_eqv_i32 (cpuinfo & CPUINFO_ZBB)
99 #define TCG_TARGET_HAS_clz_i32 (cpuinfo & CPUINFO_ZBB)
100 #define TCG_TARGET_HAS_ctz_i32 (cpuinfo & CPUINFO_ZBB)
101 #define TCG_TARGET_HAS_ctpop_i32 (cpuinfo & CPUINFO_ZBB)
110 #define TCG_TARGET_HAS_rot_i64 (cpuinfo & CPUINFO_ZBB)
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/openbmc/linux/arch/openrisc/kernel/
H A Dsetup.c102 struct cpuinfo_or1k *cpuinfo = &cpuinfo_or1k[smp_processor_id()]; in print_cpuinfo() local
108 version, revision, cpuinfo->clock_frequency / 1000000); in print_cpuinfo()
119 cpuinfo->dcache_size, cpuinfo->dcache_block_size, in print_cpuinfo()
120 cpuinfo->dcache_ways); in print_cpuinfo()
126 cpuinfo->icache_size, cpuinfo->icache_block_size, in print_cpuinfo()
127 cpuinfo->icache_ways); in print_cpuinfo()
161 struct cpuinfo_or1k *cpuinfo = &cpuinfo_or1k[cpu_id]; in setup_cpuinfo() local
168 cpuinfo->icache_ways = 1 << (iccfgr & SPR_ICCFGR_NCW); in setup_cpuinfo()
170 cpuinfo->icache_block_size = 16 << ((iccfgr & SPR_ICCFGR_CBS) >> 7); in setup_cpuinfo()
171 cpuinfo->icache_size = in setup_cpuinfo()
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H A Ddma.c28 struct cpuinfo_or1k *cpuinfo = &cpuinfo_or1k[smp_processor_id()]; in page_set_nocache() local
39 for (cl = __pa(addr); cl < __pa(next); cl += cpuinfo->dcache_block_size) in page_set_nocache()
102 struct cpuinfo_or1k *cpuinfo = &cpuinfo_or1k[smp_processor_id()]; in arch_sync_dma_for_device() local
108 cl += cpuinfo->dcache_block_size) in arch_sync_dma_for_device()
114 cl += cpuinfo->dcache_block_size) in arch_sync_dma_for_device()
H A Dtime.c74 struct cpuinfo_or1k *cpuinfo = &cpuinfo_or1k[cpu]; in openrisc_clockevent_init() local
89 clockevents_config_and_register(evt, cpuinfo->clock_frequency, in openrisc_clockevent_init()
155 struct cpuinfo_or1k *cpuinfo = &cpuinfo_or1k[smp_processor_id()]; in openrisc_timer_init() local
157 if (clocksource_register_hz(&openrisc_timer, cpuinfo->clock_frequency)) in openrisc_timer_init()
/openbmc/linux/arch/mips/include/asm/
H A Dcpu-info.h151 static inline unsigned int cpu_cluster(struct cpuinfo_mips *cpuinfo) in cpu_cluster() argument
157 return (cpuinfo->globalnumber & MIPS_GLOBALNUMBER_CLUSTER) >> in cpu_cluster()
161 static inline unsigned int cpu_core(struct cpuinfo_mips *cpuinfo) in cpu_core() argument
163 return (cpuinfo->globalnumber & MIPS_GLOBALNUMBER_CORE) >> in cpu_core()
167 static inline unsigned int cpu_vpe_id(struct cpuinfo_mips *cpuinfo) in cpu_vpe_id() argument
173 return (cpuinfo->globalnumber & MIPS_GLOBALNUMBER_VP) >> in cpu_vpe_id()
177 extern void cpu_set_cluster(struct cpuinfo_mips *cpuinfo, unsigned int cluster);
178 extern void cpu_set_core(struct cpuinfo_mips *cpuinfo, unsigned int core);
179 extern void cpu_set_vpe_id(struct cpuinfo_mips *cpuinfo, unsigned int vpe);
203 static inline unsigned long cpu_asid_mask(struct cpuinfo_mips *cpuinfo) in cpu_asid_mask() argument
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/openbmc/linux/arch/nios2/mm/
H A Dcacheflush.c23 start &= ~(cpuinfo.dcache_line_size - 1); in __flush_dcache()
24 end += (cpuinfo.dcache_line_size - 1); in __flush_dcache()
25 end &= ~(cpuinfo.dcache_line_size - 1); in __flush_dcache()
27 if (end > start + cpuinfo.dcache_size) in __flush_dcache()
28 end = start + cpuinfo.dcache_size; in __flush_dcache()
30 for (addr = start; addr < end; addr += cpuinfo.dcache_line_size) { in __flush_dcache()
42 start &= ~(cpuinfo.dcache_line_size - 1); in __invalidate_dcache()
43 end += (cpuinfo.dcache_line_size - 1); in __invalidate_dcache()
44 end &= ~(cpuinfo.dcache_line_size - 1); in __invalidate_dcache()
46 for (addr = start; addr < end; addr += cpuinfo.dcache_line_size) { in __invalidate_dcache()
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H A Dtlb.c22 ((((1UL << (cpuinfo.tlb_ptr_sz - cpuinfo.tlb_num_ways_log2))) - 1) \
55 for (way = 0; way < cpuinfo.tlb_num_ways; way++) { in replace_tlb_one_pid()
136 for (way = 0; way < cpuinfo.tlb_num_ways; way++) { in flush_tlb_one()
173 line << (PAGE_SHIFT + cpuinfo.tlb_num_ways_log2)); in dump_tlb_line()
180 for (way = 0; way < cpuinfo.tlb_num_ways; way++) { in dump_tlb_line()
212 for (i = 0; i < cpuinfo.tlb_num_lines; i++) in dump_tlb()
226 for (line = 0; line < cpuinfo.tlb_num_lines; line++) { in flush_tlb_pid()
229 for (way = 0; way < cpuinfo.tlb_num_ways; way++) { in flush_tlb_pid()
280 for (line = 0; line < cpuinfo.tlb_num_lines; line++) { in flush_tlb_all()
282 for (way = 0; way < cpuinfo.tlb_num_ways; way++) in flush_tlb_all()
/openbmc/qemu/tcg/i386/
H A Dtcg-target.h113 #define have_bmi1 (cpuinfo & CPUINFO_BMI1)
114 #define have_popcnt (cpuinfo & CPUINFO_POPCNT)
115 #define have_avx1 (cpuinfo & CPUINFO_AVX1)
116 #define have_avx2 (cpuinfo & CPUINFO_AVX2)
117 #define have_movbe (cpuinfo & CPUINFO_MOVBE)
123 #define have_avx512vl ((cpuinfo & CPUINFO_AVX512VL) && \
124 (cpuinfo & CPUINFO_AVX512F))
125 #define have_avx512bw ((cpuinfo & CPUINFO_AVX512BW) && have_avx512vl)
126 #define have_avx512dq ((cpuinfo & CPUINFO_AVX512DQ) && have_avx512vl)
127 #define have_avx512vbmi2 ((cpuinfo & CPUINFO_AVX512VBMI2) && have_avx512vl)
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/openbmc/linux/tools/perf/arch/x86/util/
H A Dtsc.c30 FILE *cpuinfo; in cpuinfo_tsc_freq() local
34 cpuinfo = fopen("/proc/cpuinfo", "r"); in cpuinfo_tsc_freq()
35 if (!cpuinfo) { in cpuinfo_tsc_freq()
39 while (getline(&line, &len, cpuinfo) > 0) { in cpuinfo_tsc_freq()
54 fclose(cpuinfo); in cpuinfo_tsc_freq()
/openbmc/linux/arch/microblaze/include/asm/
H A Dcpuinfo.h30 struct cpuinfo { struct
87 extern struct cpuinfo cpuinfo; argument
93 void set_cpuinfo_static(struct cpuinfo *ci, struct device_node *cpu);
94 void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu);
/openbmc/linux/tools/perf/arch/riscv/util/
H A Dheader.c45 FILE *cpuinfo; in _get_cpuid() local
47 cpuinfo = fopen(CPUINFO, "r"); in _get_cpuid()
48 if (cpuinfo == NULL) in _get_cpuid()
51 while ((read = getline(&line, &line_sz, cpuinfo)) != -1) { in _get_cpuid()
76 fclose(cpuinfo); in _get_cpuid()
/openbmc/qemu/tcg/ppc/
H A Dtcg-target.h66 #define have_isa_2_06 (cpuinfo & CPUINFO_V2_06)
67 #define have_isa_2_07 (cpuinfo & CPUINFO_V2_07)
68 #define have_isa_3_00 (cpuinfo & CPUINFO_V3_0)
69 #define have_isa_3_10 (cpuinfo & CPUINFO_V3_1)
70 #define have_altivec (cpuinfo & CPUINFO_ALTIVEC)
71 #define have_vsx (cpuinfo & CPUINFO_VSX)
/openbmc/linux/arch/loongarch/include/asm/
H A Dcpu-info.h113 static inline unsigned long cpu_asid_mask(struct cpuinfo_loongarch *cpuinfo) in cpu_asid_mask() argument
115 return cpuinfo->asid_mask; in cpu_asid_mask()
118 static inline void set_cpu_asid_mask(struct cpuinfo_loongarch *cpuinfo, in set_cpu_asid_mask() argument
121 cpuinfo->asid_mask = asid_mask; in set_cpu_asid_mask()
/openbmc/qemu/util/
H A Dcpuinfo-loongarch.c16 unsigned cpuinfo; variable
21 unsigned info = cpuinfo; in cpuinfo_init()
34 cpuinfo = info; in cpuinfo_init()
H A Dcpuinfo-ppc.c26 unsigned cpuinfo; variable
31 unsigned info = cpuinfo; in cpuinfo_init()
74 cpuinfo = info; in cpuinfo_init()
/openbmc/linux/arch/nios2/include/asm/
H A Dcpuinfo.h11 struct cpuinfo { struct
42 extern struct cpuinfo cpuinfo; argument
/openbmc/openbmc/poky/meta/recipes-devtools/gcc/gcc/
H A D0020-libgcc_s-Use-alias-for-__cpu_indicator_init-instead-.patch20 * config/i386/cpuinfo.c (__cpu_indicator_init_local): Add.
37 libgcc/config/i386/cpuinfo.c | 6 +++---
58 diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c
60 --- a/libgcc/config/i386/cpuinfo.c
61 +++ b/libgcc/config/i386/cpuinfo.c
/openbmc/openbmc/meta-phosphor/recipes-phosphor/smbios/
H A Dsmbios-mdr_git.bb15 PACKAGECONFIG[cpuinfo] = "-Dcpuinfo=enabled,-Dcpuinfo=disabled,i2c-tools"
16 PACKAGECONFIG[cpuinfo-peci] = "-Dcpuinfo-peci=enabled,-Dcpuinfo-peci=disabled,libpeci"
26 …SERVICE:${PN} += "${@bb.utils.contains('PACKAGECONFIG', 'cpuinfo', 'xyz.openbmc_project.cpuinfo.se…
/openbmc/qemu/tcg/loongarch64/
H A Dtcg-target.h170 #define TCG_TARGET_HAS_qemu_ldst_i128 (cpuinfo & CPUINFO_LSX)
174 #define TCG_TARGET_HAS_v64 (cpuinfo & CPUINFO_LSX)
175 #define TCG_TARGET_HAS_v128 (cpuinfo & CPUINFO_LSX)
176 #define TCG_TARGET_HAS_v256 (cpuinfo & CPUINFO_LASX)

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