Searched refs:cpu_SR (Results 1 – 1 of 1) sorted by relevance
| /openbmc/qemu/target/xtensa/ |
| H A D | translate.c | 87 static TCGv_i32 cpu_SR[256]; variable
206 cpu_SR[i] = tcg_global_mem_new_i32(tcg_env, in xtensa_translate_init()
291 tcg_gen_andi_i32(cpu_SR[SAR], sa, 0x1f); in gen_right_shift_sar()
305 tcg_gen_sub_i32(cpu_SR[SAR], tcg_constant_i32(32), dc->sar_m32); in gen_left_shift_sar()
364 tcg_gen_mov_i32(cpu_SR[ICOUNT], dc->next_icount); in gen_jump_slot()
397 tcg_gen_deposit_i32(cpu_SR[PS], cpu_SR[PS], in gen_callw_slot()
409 tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_SR[LCOUNT], 0, label); in gen_check_loop_end()
410 tcg_gen_subi_i32(cpu_SR[LCOUNT], cpu_SR[LCOUNT], 1); in gen_check_loop_end()
414 gen_jump(dc, cpu_SR[LBEG]); in gen_check_loop_end()
1183 tcg_gen_addi_i32(dc->next_icount, cpu_SR[ICOUNT], 1); in xtensa_tr_translate_insn()
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