Searched refs:cpu_M0 (Results 1 – 1 of 1) sorted by relevance
| /openbmc/qemu/target/arm/tcg/ |
| H A D | translate.c | 47 static TCGv_i64 cpu_V0, cpu_V1, cpu_M0; variable
1291 iwmmxt_store_reg(cpu_M0, rn); in gen_op_iwmmxt_movq_wRn_M0()
1296 iwmmxt_load_reg(cpu_M0, rn); in gen_op_iwmmxt_movq_M0_wRn()
1302 tcg_gen_or_i64(cpu_M0, cpu_M0, cpu_V1); in gen_op_iwmmxt_orq_M0_wRn()
1308 tcg_gen_and_i64(cpu_M0, cpu_M0, cpu_V1); in gen_op_iwmmxt_andq_M0_wRn()
1314 tcg_gen_xor_i64(cpu_M0, cpu_M0, cpu_V1); in gen_op_iwmmxt_xorq_M0_wRn()
1321 gen_helper_iwmmxt_##name(cpu_M0, cpu_M0, cpu_V1); \
1328 gen_helper_iwmmxt_##name(cpu_M0, tcg_env, cpu_M0, cpu_V1); \
1339 gen_helper_iwmmxt_##name(cpu_M0, tcg_env, cpu_M0); \
1416 gen_helper_iwmmxt_setpsr_nz(tmp, cpu_M0); in gen_op_iwmmxt_setpsr_nz()
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