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Searched refs:cpm_regs (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/mips/mach-jz47xx/jz4780/
H A Dpll.c372 void __iomem *cpm_regs = (void __iomem *)CPM_BASE; in pll_init_one() local
373 void __iomem *pll_reg = cpm_regs + CPM_CPAPCR + ((pll - 1) * 4); in pll_init_one()
384 void __iomem *cpm_regs = (void __iomem *)CPM_BASE; in cpu_mux_select() local
405 clrsetbits_le32(cpm_regs + CPM_CPCCR, 0x00ffffff, clk_ctrl); in cpu_mux_select()
407 while (readl(cpm_regs + CPM_CPCSR) & (CPM_CPCSR_CDIV_BUSY | in cpu_mux_select()
419 clrsetbits_le32(cpm_regs + CPM_CPCCR, 0xff << 24, clk_ctrl); in cpu_mux_select()
424 void __iomem *cpm_regs = (void __iomem *)CPM_BASE; in ddr_mux_select() local
430 cpm_regs + CPM_DDCDR); in ddr_mux_select()
432 while (readl(cpm_regs + CPM_DDCDR) & CPM_DDRCDR_DDR_BUSY) in ddr_mux_select()
435 clrbits_le32(cpm_regs + CPM_CLKGR0, CPM_CLKGR0_DDR0); in ddr_mux_select()
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H A Dsdram.c195 void __iomem *cpm_regs = (void __iomem *)CPM_BASE; in sdram_init() local
205 writel(0x3, cpm_regs + 0xd0); in sdram_init()
207 writel(0x1, cpm_regs + 0xd0); in sdram_init()