Home
last modified time | relevance | path

Searched refs:cpll_init_cfg (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/drivers/clk/rockchip/
H A Dclk_rk3188.c82 static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2); variable
386 rkclk_set_pll(cru, CLK_CODEC, &cpll_init_cfg, has_bwadj); in rkclk_init()
H A Dclk_rk3368.c54 static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 6); variable
142 rkclk_set_pll(cru, CPLL, &cpll_init_cfg); in rkclk_init()
H A Dclk_rk3328.c38 static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 2, 2, 1); variable
287 rkclk_set_pll(cru, CLK_CODEC, &cpll_init_cfg); in rkclk_init()
H A Dclk_rk3288.c142 static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2); variable
435 rkclk_set_pll(cru, CLK_CODEC, &cpll_init_cfg); in rkclk_init()
H A Dclk_rk3399.c51 static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2, 2); variable
1114 rkclk_set_pll(&cru->cpll_con[0], &cpll_init_cfg); in rkclk_init()