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Searched refs:cp0 (Results 1 – 25 of 30) sorted by relevance

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/openbmc/linux/arch/arm64/boot/dts/marvell/
H A Darmada-7040-mochabin.dts73 cp0_uart0_pins: cp0-uart0-pins {
78 cp0_spi0_pins: cp0-spi0-pins {
83 cp0_spi1_pins: cp0-spi1-pins {
88 cp0_i2c0_pins: cp0-i2c0-pins {
93 cp0_i2c1_pins: cp0-i2c1-pins {
103 cp0_rgmii1_pins: cp0-rgmii1-pins {
114 cp0_pcie_reset_pins: cp0-pcie-reset-pins {
119 cp0_pcie_clkreq_pins: cp0-pcie-clkreq-pins {
124 cp0_switch_pins: cp0-switch-pins {
129 cp0_phy_pins: cp0-phy-pins {
[all …]
H A Darmada-8040-db.dts34 cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus {
36 regulator-name = "cp0-usb3h0-vbus";
43 cp0_reg_usb3_1_vbus: cp0-usb3-1-vbus {
45 regulator-name = "cp0-usb3h1-vbus";
52 cp0_usb3_0_phy: cp0-usb3-0-phy {
107 phy-names = "cp0-pcie0-x1-phy";
114 phy-names = "cp0-pcie2-x1-phy";
148 phy-names = "cp0-sata0-0-phy";
152 phy-names = "cp0-sata0-1-phy";
H A Darmada-7040-db.dts33 regulator-name = "cp0-usb3-0-current-regulator";
46 regulator-name = "cp0-usb3-1-current-regulator";
57 cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus {
67 cp0_reg_usb3_1_vbus: cp0-usb3-1-vbus {
118 phy-names = "cp0-pcie2-x1-phy";
217 phy-names = "cp0-sata0-1-phy";
234 phy-names = "cp0-usb3h0-comphy", "utmi";
248 phy-names = "cp0-usb3h1-comphy", "utmi";
H A Dcn9130-db.dtsi44 regulator-name = "cp0-xhci0-vbus";
58 regulator-name = "cp0-xhci1-vbus";
343 cp0_i2c0_pins: cp0-i2c-pins-0 {
347 cp0_i2c1_pins: cp0-i2c-pins-1 {
351 cp0_ge1_rgmii_pins: cp0-ge-rgmii-pins-0 {
358 cp0_ge2_rgmii_pins: cp0-ge-rgmii-pins-1 {
365 cp0_sdhci_cd_pins: cp0-sdhci-cd-pins-0 {
369 cp0_sdhci_pins: cp0-sdhi-pins-0 {
374 cp0_spi1_pins: cp0-spi-pins-1 {
H A Dcn9130-crb.dtsi41 regulator-name = "cp0-xhci1-vbus";
106 cp0_i2c0_pins: cp0-i2c-pins-0 {
110 cp0_i2c1_pins: cp0-i2c-pins-1 {
114 cp0_sdhci_cd_pins_crb: cp0-sdhci-cd-pins-crb {
118 cp0_sdhci_pins: cp0-sdhi-pins-0 {
123 cp0_spi1_pins: cp0-spi-pins-1 {
H A Darmada-8040-mcbin.dtsi188 phy-names = "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy",
189 "cp0-pcie0-x4-lane2-phy", "cp0-pcie0-x4-lane3-phy";
248 phy-names = "cp0-sata0-1-phy";
H A Darmada-8040-puzzle-m801.dts67 sfp_cp0_eth0: sfp-cp0-eth0 {
337 phy-names = "cp0-pcie0-x1-phy";
411 phy-names = "cp0-sata0-0-phy";
416 phy-names = "cp0-sata0-1-phy";
H A Dcn9130.dtsi27 #define CP11X_NAME cp0
H A Darmada-70x0.dtsi20 #define CP11X_NAME cp0
H A Darmada-80x0.dtsi22 #define CP11X_NAME cp0
H A Darmada-8040-clearfog-gt-8k.dts64 sfp_cp0_eth0: sfp-cp0-eth0 {
369 phy-names = "cp0-pcie0-x1-phy";
/openbmc/linux/security/tomoyo/
H A Drealpath.c29 char *cp0; in tomoyo_encode2() local
48 cp0 = cp; in tomoyo_encode2()
65 return cp0; in tomoyo_encode2()
H A Dcommon.c2652 char *cp0; in tomoyo_write_control() local
2659 cp0 = head->write_buf; in tomoyo_write_control()
2674 memmove(cp, cp0, head->w.avail); in tomoyo_write_control()
2675 kfree(cp0); in tomoyo_write_control()
2677 cp0 = cp; in tomoyo_write_control()
2686 cp0[head->w.avail++] = c; in tomoyo_write_control()
2689 cp0[head->w.avail - 1] = '\0'; in tomoyo_write_control()
2691 tomoyo_normalize_line(cp0); in tomoyo_write_control()
2692 if (!strcmp(cp0, "reset")) { in tomoyo_write_control()
2704 if (tomoyo_select_domain(head, cp0)) in tomoyo_write_control()
[all …]
/openbmc/linux/arch/arm/kernel/
H A DMakefile75 obj-$(CONFIG_CPU_XSCALE) += xscale-cp0.o
76 obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o
77 obj-$(CONFIG_CPU_MOHAWK) += xscale-cp0.o
/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dpci-armada8k.txt25 Must be "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy" for
/openbmc/qemu/target/mips/sysemu/
H A Dmeson.build3 'cp0.c',
/openbmc/linux/arch/xtensa/kernel/
H A Dptrace.c137 newregs->cp0 = ti->xtregs_cp.cp0; in tie_get()
175 ti->xtregs_cp.cp0 = newregs->cp0; in tie_set()
H A Dasm-offsets.c105 DEFINE(THREAD_XTREGS_CP0, offsetof(struct thread_info, xtregs_cp.cp0)); in main()
/openbmc/linux/arch/xtensa/include/asm/
H A Dthread_info.h36 xtregs_cp0_t cp0; member
H A Delf.h182 xtregs_cp0_t cp0; member
/openbmc/linux/Documentation/driver-api/mtd/
H A Dnand_ecc.rst53 cp1 cp0 cp1 cp0 cp1 cp0 cp1 cp0
63 - cp0 is the parity that belongs to all bit0, bit2, bit4, bit6.
65 so the sum of all bit0, bit2, bit4 and bit6 values + cp0 itself is even.
74 Note that each of cp0 .. cp5 is exactly one bit.
109 ECC 2 cp5 cp4 cp3 cp2 cp1 cp0 1 1
160 cp0 = bit6 ^ bit4 ^ bit2 ^ bit0 ^ cp0;
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dti,da850-pupd.txt18 Valid names are "cp0".."cp31".
/openbmc/u-boot/arch/mips/cpu/
H A Dstart.S85 mtc0 zero, CP0_COUNT # clear cp0 count for most accurate boot timing
/openbmc/u-boot/doc/device-tree-bindings/pinctrl/
H A Dmarvell,mvebu-pinctrl.txt57 bank-name ="cp0-110";
/openbmc/u-boot/arch/arm/dts/
H A Darmada-cp110-master.dtsi125 bank-name ="cp0-110";

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