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Searched refs:control_ddrch1_0 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/mach-omap2/omap5/
H A Dhwinit.c59 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch1_0); in io_settings_lpddr2()
78 writel(ioregs->ctrl_ddrch, (*ctrl)->control_ddrch1_0); in io_settings_ddr3()
H A Dprcm-regs.c328 .control_ddrch1_0 = 0x4A002E38,
420 .control_ddrch1_0 = 0x4A002E38,
/openbmc/u-boot/arch/arm/include/asm/
H A Domap_common.h417 u32 control_ddrch1_0; member