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Searched refs:conf_reg (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/tty/serial/
H A Dmen_z135_uart.c479 u32 conf_reg; in men_z135_set_mctrl() local
481 conf_reg = old = ioread32(port->membase + MEN_Z135_CONF_REG); in men_z135_set_mctrl()
483 conf_reg |= MEN_Z135_MCR_RTS; in men_z135_set_mctrl()
485 conf_reg &= ~MEN_Z135_MCR_RTS; in men_z135_set_mctrl()
488 conf_reg |= MEN_Z135_MCR_DTR; in men_z135_set_mctrl()
490 conf_reg &= ~MEN_Z135_MCR_DTR; in men_z135_set_mctrl()
493 conf_reg |= MEN_Z135_MCR_OUT1; in men_z135_set_mctrl()
495 conf_reg &= ~MEN_Z135_MCR_OUT1; in men_z135_set_mctrl()
498 conf_reg |= MEN_Z135_MCR_OUT2; in men_z135_set_mctrl()
500 conf_reg &= ~MEN_Z135_MCR_OUT2; in men_z135_set_mctrl()
[all …]
/openbmc/u-boot/drivers/pinctrl/nxp/
H A Dpinctrl-imx.c25 int mux_reg, conf_reg, input_reg; in imx_pinctrl_set_state() local
78 conf_reg = mux_reg; in imx_pinctrl_set_state()
80 conf_reg = pin_data[j++]; in imx_pinctrl_set_state()
82 !conf_reg) in imx_pinctrl_set_state()
83 conf_reg = -1; in imx_pinctrl_set_state()
86 if ((mux_reg == -1) || (conf_reg == -1)) { in imx_pinctrl_set_state()
100 mux_reg, conf_reg, input_reg, mux_mode, in imx_pinctrl_set_state()
174 clrsetbits_le32(info->base + conf_reg, in imx_pinctrl_set_state()
179 info->base + conf_reg); in imx_pinctrl_set_state()
183 "0x%x\n", conf_reg, config_val); in imx_pinctrl_set_state()
/openbmc/linux/drivers/pinctrl/freescale/
H A Dpinctrl-imx.c302 if (pin_reg->conf_reg == -1) { in imx_pinconf_get_mmio()
308 *config = readl(ipctl->base + pin_reg->conf_reg); in imx_pinconf_get_mmio()
337 if (pin_reg->conf_reg == -1) { in imx_pinconf_set_mmio()
349 reg = readl(ipctl->base + pin_reg->conf_reg); in imx_pinconf_set_mmio()
352 writel(reg, ipctl->base + pin_reg->conf_reg); in imx_pinconf_set_mmio()
354 pin_reg->conf_reg, reg); in imx_pinconf_set_mmio()
356 writel(configs[i], ipctl->base + pin_reg->conf_reg); in imx_pinconf_set_mmio()
358 pin_reg->conf_reg, configs[i]); in imx_pinconf_set_mmio()
399 if (pin_reg->conf_reg == -1) { in imx_pinconf_dbg_show()
404 config = readl(ipctl->base + pin_reg->conf_reg); in imx_pinconf_dbg_show()
[all …]
H A Dpinctrl-imx.h66 s16 conf_reg; member
/openbmc/linux/drivers/pinctrl/intel/
H A Dpinctrl-baytrail.c745 void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG); in byt_gpio_direct_irq_check() local
753 if (readl(conf_reg) & BYT_DIRECT_IRQ_EN) in byt_gpio_direct_irq_check()
842 void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG); in byt_pin_config_get() local
850 conf = readl(conf_reg); in byt_pin_config_get()
926 void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG); in byt_pin_config_set() local
937 conf = readl(conf_reg); in byt_pin_config_set()
1046 writel(conf, conf_reg); in byt_pin_config_set()
1178 void __iomem *conf_reg, *val_reg; in byt_gpio_dbg_show() local
1187 conf_reg = byt_gpio_reg(vg, pin, BYT_CONF0_REG); in byt_gpio_dbg_show()
1188 if (!conf_reg) { in byt_gpio_dbg_show()
[all …]
/openbmc/linux/drivers/hwmon/
H A Demc2103.c426 u8 conf_reg; in pwm1_enable_store() local
445 result = read_u8_from_i2c(client, REG_FAN_CONF1, &conf_reg); in pwm1_enable_store()
452 conf_reg |= 0x80; in pwm1_enable_store()
454 conf_reg &= ~0x80; in pwm1_enable_store()
456 i2c_smbus_write_byte_data(client, REG_FAN_CONF1, conf_reg); in pwm1_enable_store()
/openbmc/linux/drivers/crypto/rockchip/
H A Drk3288_crypto_skcipher.c258 u32 block, conf_reg = 0; in rk_cipher_hw_init() local
268 conf_reg = RK_CRYPTO_DESSEL; in rk_cipher_hw_init()
281 conf_reg |= RK_CRYPTO_BYTESWAP_BTFIFO | in rk_cipher_hw_init()
283 CRYPTO_WRITE(dev, RK_CRYPTO_CONF, conf_reg); in rk_cipher_hw_init()
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dfsl,imx6sx-pinctrl.txt9 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
H A Dfsl,imx6ul-pinctrl.txt10 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
H A Dfsl,imx6sll-pinctrl.txt9 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
H A Dfsl,imx-pinctrl.txt26 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
/openbmc/u-boot/board/gateworks/gw_ventana/
H A Dgw_ventana.c1278 u32 conf_reg = fdt32_to_cpu(range[i+1]); in ft_board_setup() local
1282 conf_reg == 0x630) in ft_board_setup()
1286 conf_reg == 0x3a0) in ft_board_setup()