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Searched refs:cntr7clk (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/arch/arm/dts/
H A Dsocfpga_arria10_socdk_sdmmc_handoff.dtsi85 cntr7clk-cnt = <900>; /* Field: cntr7clk.cnt */
86 cntr7clk-src = <0>; /* Field: cntr7clk.src */
115 cntr7clk-cnt = <900>; /* Field: cntr7clk.cnt */
/openbmc/u-boot/arch/arm/mach-socfpga/
H A Dclock_manager_s10.c125 writel(0xff, &clock_manager_base->main_pll.cntr7clk); in cm_basic_init()
133 writel(0xff, &clock_manager_base->per_pll.cntr7clk); in cm_basic_init()
144 writel(cfg->main_pll_cntr7clk, &clock_manager_base->main_pll.cntr7clk); in cm_basic_init()
152 writel(cfg->per_pll_cntr7clk, &clock_manager_base->per_pll.cntr7clk); in cm_basic_init()
H A Dclock_manager_arria10.c762 &clock_manager_base->main_pll.cntr7clk); in cm_full_cfg()
795 writel(per_cfg->cntr7clk_cnt, &clock_manager_base->per_pll.cntr7clk); in cm_full_cfg()
/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_arria10.h27 u32 cntr7clk; member
53 u32 cntr7clk; member
H A Dclock_manager_s10.h86 u32 cntr7clk; member
112 u32 cntr7clk; member