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Searched refs:clock_req (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_pp_smu.c602 struct pp_display_clock_request clock_req; in pp_nv_set_hard_min_dcefclk_by_freq() local
605 clock_req.clock_type = amd_pp_dcef_clock; in pp_nv_set_hard_min_dcefclk_by_freq()
606 clock_req.clock_freq_in_khz = mhz * 1000; in pp_nv_set_hard_min_dcefclk_by_freq()
611 ret = amdgpu_dpm_display_clock_voltage_request(adev, &clock_req); in pp_nv_set_hard_min_dcefclk_by_freq()
625 struct pp_display_clock_request clock_req; in pp_nv_set_hard_min_uclk_by_freq() local
628 clock_req.clock_type = amd_pp_mem_clock; in pp_nv_set_hard_min_uclk_by_freq()
629 clock_req.clock_freq_in_khz = mhz * 1000; in pp_nv_set_hard_min_uclk_by_freq()
634 ret = amdgpu_dpm_display_clock_voltage_request(adev, &clock_req); in pp_nv_set_hard_min_uclk_by_freq()
661 struct pp_display_clock_request clock_req; in pp_nv_set_voltage_by_freq() local
666 clock_req.clock_type = amd_pp_disp_clock; in pp_nv_set_voltage_by_freq()
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/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu10_hwmgr.c52 struct pp_display_clock_request *clock_req) in smu10_display_clock_voltage_request() argument
55 enum amd_pp_clock_type clk_type = clock_req->clock_type; in smu10_display_clock_voltage_request()
56 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000; in smu10_display_clock_voltage_request()
192 struct pp_display_clock_request clock_req; in smu10_set_clock_limit() local
195 clock_req.clock_type = amd_pp_dcf_clock; in smu10_set_clock_limit()
196 clock_req.clock_freq_in_khz = clocks.dcefClock * 10; in smu10_set_clock_limit()
198 PP_ASSERT_WITH_CODE(!smu10_display_clock_voltage_request(hwmgr, &clock_req), in smu10_set_clock_limit()
H A Dvega12_hwmgr.c1574 struct pp_display_clock_request *clock_req) in vega12_display_clock_voltage_request() argument
1578 enum amd_pp_clock_type clk_type = clock_req->clock_type; in vega12_display_clock_voltage_request()
1579 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000; in vega12_display_clock_voltage_request()
1621 struct pp_display_clock_request clock_req; in vega12_notify_smc_display_config_after_ps_adjustment() local
1635 clock_req.clock_type = amd_pp_dcef_clock; in vega12_notify_smc_display_config_after_ps_adjustment()
1636 clock_req.clock_freq_in_khz = min_clocks.dcefClock / 10; in vega12_notify_smc_display_config_after_ps_adjustment()
1637 if (!vega12_display_clock_voltage_request(hwmgr, &clock_req)) { in vega12_notify_smc_display_config_after_ps_adjustment()
H A Dvega20_hwmgr.c2299 struct pp_display_clock_request *clock_req) in vega20_display_clock_voltage_request() argument
2303 enum amd_pp_clock_type clk_type = clock_req->clock_type; in vega20_display_clock_voltage_request()
2304 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000; in vega20_display_clock_voltage_request()
2355 struct pp_display_clock_request clock_req; in vega20_notify_smc_display_config_after_ps_adjustment() local
2363 clock_req.clock_type = amd_pp_dcef_clock; in vega20_notify_smc_display_config_after_ps_adjustment()
2364 clock_req.clock_freq_in_khz = min_clocks.dcefClock * 10; in vega20_notify_smc_display_config_after_ps_adjustment()
2365 if (!vega20_display_clock_voltage_request(hwmgr, &clock_req)) { in vega20_notify_smc_display_config_after_ps_adjustment()
H A Dvega10_hwmgr.c4033 struct pp_display_clock_request *clock_req) in vega10_display_clock_voltage_request() argument
4036 enum amd_pp_clock_type clk_type = clock_req->clock_type; in vega10_display_clock_voltage_request()
4037 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000; in vega10_display_clock_voltage_request()
4103 struct pp_display_clock_request clock_req; in vega10_notify_smc_display_config_after_ps_adjustment() local
4122 clock_req.clock_type = amd_pp_dcef_clock; in vega10_notify_smc_display_config_after_ps_adjustment()
4123 clock_req.clock_freq_in_khz = dpm_table->dpm_levels[i].value * 10; in vega10_notify_smc_display_config_after_ps_adjustment()
4124 if (!vega10_display_clock_voltage_request(hwmgr, &clock_req)) { in vega10_notify_smc_display_config_after_ps_adjustment()
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/inc/
H A Dsmu_v13_0.h186 *clock_req);
H A Dsmu_v11_0.h207 *clock_req);
H A Damdgpu_smu.h1073 *clock_req);
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dsmu_v11_0.c1054 *clock_req) in smu_v11_0_display_clock_voltage_request()
1056 enum amd_pp_clock_type clk_type = clock_req->clock_type; in smu_v11_0_display_clock_voltage_request()
1059 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000; in smu_v11_0_display_clock_voltage_request()
H A Dnavi10_ppt.c2096 struct pp_display_clock_request clock_req; in navi10_notify_smc_display_config() local
2104 clock_req.clock_type = amd_pp_dcef_clock; in navi10_notify_smc_display_config()
2105 clock_req.clock_freq_in_khz = min_clocks.dcef_clock * 10; in navi10_notify_smc_display_config()
2107 ret = smu_v11_0_display_clock_voltage_request(smu, &clock_req); in navi10_notify_smc_display_config()
H A Dsienna_cichlid_ppt.c1781 struct pp_display_clock_request clock_req; in sienna_cichlid_notify_smc_display_config() local
1789 clock_req.clock_type = amd_pp_dcef_clock; in sienna_cichlid_notify_smc_display_config()
1790 clock_req.clock_freq_in_khz = min_clocks.dcef_clock * 10; in sienna_cichlid_notify_smc_display_config()
1792 ret = smu_v11_0_display_clock_voltage_request(smu, &clock_req); in sienna_cichlid_notify_smc_display_config()
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0.c1080 *clock_req) in smu_v13_0_display_clock_voltage_request()
1082 enum amd_pp_clock_type clk_type = clock_req->clock_type; in smu_v13_0_display_clock_voltage_request()
1085 uint32_t clk_freq = clock_req->clock_freq_in_khz / 1000; in smu_v13_0_display_clock_voltage_request()
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/
H A Damdgpu_smu.c2823 struct pp_display_clock_request *clock_req) in smu_display_clock_voltage_request() argument
2832 ret = smu->ppt_funcs->display_clock_voltage_request(smu, clock_req); in smu_display_clock_voltage_request()