/openbmc/linux/arch/mips/net/ |
H A D | bpf_jit_comp.h | 83 u32 clobbered; /* Bit mask of modified CPU registers */ member 138 ctx->clobbered |= BIT(reg); in clobber_reg()
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H A D | bpf_jit_comp32.c | 535 push_regs(ctx, ctx->clobbered & JIT_CALLER_REGS, in emit_divmod_r64() 566 pop_regs(ctx, ctx->clobbered & JIT_CALLER_REGS, in emit_divmod_r64() 721 push_regs(ctx, ctx->clobbered & JIT_CALLER_REGS, in emit_atomic_r32() 784 pop_regs(ctx, ctx->clobbered & JIT_CALLER_REGS, in emit_atomic_r32() 806 push_regs(ctx, ctx->clobbered & JIT_CALLER_REGS, in emit_atomic_r64() 866 pop_regs(ctx, ctx->clobbered & JIT_CALLER_REGS, in emit_atomic_r64() 878 push_regs(ctx, ctx->clobbered & JIT_CALLER_REGS, in emit_cmpxchg_r32() 900 pop_regs(ctx, ctx->clobbered & JIT_CALLER_REGS, in emit_cmpxchg_r32() 916 push_regs(ctx, ctx->clobbered & JIT_CALLER_REGS, in emit_cmpxchg_r64() 935 pop_regs(ctx, ctx->clobbered & JIT_CALLER_REGS, in emit_cmpxchg_r64() [all …]
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H A D | bpf_jit_comp64.c | 454 push_regs(ctx, ctx->clobbered & JIT_CALLER_REGS, 0, 0); in emit_call() 462 pop_regs(ctx, ctx->clobbered & JIT_CALLER_REGS, 0, 0); in emit_call() 583 saved = hweight32(ctx->clobbered & JIT_CALLEE_REGS) * sizeof(u64); in build_prologue() 602 push_regs(ctx, ctx->clobbered & JIT_CALLEE_REGS, 0, stack - saved); in build_prologue() 622 pop_regs(ctx, ctx->clobbered & JIT_CALLEE_REGS, 0, in build_epilogue()
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/openbmc/linux/arch/arm/include/debug/ |
H A D | sa1100.S | 25 @ We assume r1 can be clobbered.
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/openbmc/linux/arch/arm/kernel/ |
H A D | entry-v7m.S | 78 @ return. r4-r7 were not clobbered in v7m_exception_entry so for
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-dbs/influxdb/influxdb/ |
H A D | 0001-Use-v2.1.2-xxhash-to-fix-build-with-go-1.17.patch | 8 | asm: xxhash_amd64.s:120: when dynamic linking, R15 is clobbered by a global variable access and i…
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/openbmc/openbmc/poky/meta/recipes-devtools/gcc/gcc/ |
H A D | 0009-gcc-armv4-pass-fix-v4bx-to-linker-to-support-EABI.patch | 32 /* At this point, bpabi.h will have clobbered LINK_SPEC. We want to
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H A D | 0007-Define-GLIBC_DYNAMIC_LINKER-and-UCLIBC_DYNAMIC_LINKE.patch | 92 /* At this point, bpabi.h will have clobbered LINK_SPEC. We want to
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/openbmc/openbmc/meta-arm/meta-arm-bsp/recipes-bsp/u-boot/u-boot/corstone1000/ |
H A D | 0001-FF-A-v15-arm64-smccc-add-support-for-SMCCCv1.2-x0-x1.patch | 55 + /* Save `res` and free a GPR that won't be clobbered */ 58 + /* Ensure `args` won't be clobbered while loading regs in next step */
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/openbmc/linux/Documentation/bpf/ |
H A D | linux-notes.rst | 69 * Registers R1-R5 are scratch registers that are clobbered by the
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/openbmc/linux/Documentation/process/ |
H A D | magic-number.rst | 13 has been clobbered, or (b) you've passed the wrong structure to a
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/openbmc/openbmc/poky/meta/recipes-extended/libaio/libaio/ |
H A D | 00_arches.patch | 388 + are treated specially. Although r19 is clobbered by the syscall 390 + r4 is clobbered and use that register to save/restore r19 446 +/* The registers not listed as inputs but clobbered */
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/openbmc/linux/arch/arc/include/asm/ |
H A D | entry-arcv2.h | 89 ; _HARD saves r10 clobbered by _SOFT as scratch hence comes first
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/openbmc/u-boot/doc/ |
H A D | README.standalone | 118 Note that these functions may only use call-clobbered registers;
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/openbmc/linux/Documentation/riscv/ |
H A D | vector.rst | 138 clobbered by system calls.
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/openbmc/linux/Documentation/virt/kvm/x86/ |
H A D | hypercalls.rst | 14 placed in rax. No other registers will be clobbered unless explicitly stated
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/nss/ |
H A D | nss_3.107.bb | 128 # Optimization will get clobbered, but most of the stuff will survive.
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/openbmc/qemu/tcg/tci/ |
H A D | tcg-target.c.inc | 194 /* Either 2 or 4 of these are call clobbered, so use them last. */ 938 * cannot be clobbered by the called helper functions. However,
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/openbmc/linux/tools/testing/selftests/sgx/ |
H A D | main.c | 262 #define ENCL_CALL(op, run, clobbered) \ argument 265 if ((clobbered)) \
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/openbmc/qemu/tcg/s390x/ |
H A D | tcg-target.c.inc | 338 call-saved registers. Likewise prefer the call-clobbered registers 350 /* Call clobbered registers. */ 1515 result into R0, allowing R1 == TCG_TMP0 to be clobbered as well. */ 3516 /* The return register can be considered call-clobbered. */
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/openbmc/linux/arch/x86/crypto/ |
H A D | sha512-avx2-asm.S | 598 # save %rdi (CTX) before it gets clobbered
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H A D | aesni-intel_avx-x86_64.S | 966 ## r10, r11, r12, rax are clobbered 1914 ## r10, r11, r12, rax are clobbered
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/openbmc/qemu/docs/devel/ |
H A D | tcg-ops.rst | 955 - Some registers are clobbered during the call.
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/openbmc/qemu/tcg/ppc/ |
H A D | tcg-target.c.inc | 146 TCG_REG_R12, /* call clobbered, non-arguments */ 150 TCG_REG_R10, /* call clobbered, arguments */ 160 TCG_REG_V2, /* call clobbered, vectors */
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/openbmc/qemu/tcg/loongarch64/ |
H A D | tcg-target.c.inc | 117 /* Registers (potentially) clobbered across calls */
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