Searched refs:clkdvdr (Results 1 – 8 of 8) sorted by relevance
60 temp = in_be32(&gur->clkdvdr) & 0x2000FFFF; in diu_set_pixel_clock()61 out_be32(&gur->clkdvdr, temp); /* turn off clock */ in diu_set_pixel_clock()62 out_be32(&gur->clkdvdr, temp | 0x80000000 | ((pixval & 0x1F) << 16)); in diu_set_pixel_clock()
79 clrbits32(&guts->clkdvdr, in p1022rdk_set_pixel_clock()83 setbits32(&guts->clkdvdr, CLKDVDR_PXCKEN | (pxclk << 16)); in p1022rdk_set_pixel_clock()
409 clrbits32(&guts->clkdvdr, in p1022ds_set_pixel_clock()413 setbits32(&guts->clkdvdr, CLKDVDR_PXCKEN | (pxclk << 16)); in p1022ds_set_pixel_clock()
78 temp = in_be32(&gur->clkdvdr) & 0x2000FFFF; in diu_set_pixel_clock()79 out_be32(&gur->clkdvdr, temp); /* turn off clock */ in diu_set_pixel_clock()80 out_be32(&gur->clkdvdr, temp | 0x80000000 | ((pixval & 0x1F) << 16)); in diu_set_pixel_clock()
23 volatile unsigned int *guts_clkdvdr = &gur->clkdvdr; in diu_set_pixel_clock()
102 u32 clkdvdr; /* 0x.0800 - Clock Divide Register */ member
1103 uint clkdvdr; /* 0xe0800 - Clock Divide register */ member
2494 u32 clkdvdr; /* Clock Divide register */ member