Home
last modified time | relevance | path

Searched refs:clkctrl_regs (Results 1 – 8 of 8) sorted by relevance

/openbmc/u-boot/arch/arm/cpu/arm926ejs/mxs/
H A Dclock.c38 struct mxs_clkctrl_regs *clkctrl_regs = in mxs_get_pclk() local
44 clkctrl = readl(&clkctrl_regs->hw_clkctrl_cpu); in mxs_get_pclk()
52 clkseq = readl(&clkctrl_regs->hw_clkctrl_clkseq); in mxs_get_pclk()
62 clkfrac = readb(&clkctrl_regs->hw_clkctrl_frac0[CLKCTRL_FRAC0_CPU]); in mxs_get_pclk()
70 struct mxs_clkctrl_regs *clkctrl_regs = in mxs_get_hclk() local
76 clkctrl = readl(&clkctrl_regs->hw_clkctrl_hbus); in mxs_get_hclk()
88 struct mxs_clkctrl_regs *clkctrl_regs = in mxs_get_emiclk() local
94 clkseq = readl(&clkctrl_regs->hw_clkctrl_clkseq); in mxs_get_emiclk()
95 clkctrl = readl(&clkctrl_regs->hw_clkctrl_emi); in mxs_get_emiclk()
105 clkfrac = readb(&clkctrl_regs->hw_clkctrl_frac0[CLKCTRL_FRAC0_EMI]); in mxs_get_emiclk()
[all …]
H A Dspl_mem_init.c143 struct mxs_clkctrl_regs *clkctrl_regs = in mxs_mem_init_clock() local
157 &clkctrl_regs->hw_clkctrl_frac0_set[CLKCTRL_FRAC0_EMI]); in mxs_mem_init_clock()
161 &clkctrl_regs->hw_clkctrl_frac0[CLKCTRL_FRAC0_EMI]); in mxs_mem_init_clock()
165 &clkctrl_regs->hw_clkctrl_frac0_clr[CLKCTRL_FRAC0_EMI]); in mxs_mem_init_clock()
172 &clkctrl_regs->hw_clkctrl_emi); in mxs_mem_init_clock()
176 &clkctrl_regs->hw_clkctrl_clkseq_clr); in mxs_mem_init_clock()
184 struct mxs_clkctrl_regs *clkctrl_regs = in mxs_mem_setup_cpu_and_hbus() local
192 (uint8_t *)&clkctrl_regs->hw_clkctrl_frac0[CLKCTRL_FRAC0_CPU]); in mxs_mem_setup_cpu_and_hbus()
196 &clkctrl_regs->hw_clkctrl_clkseq_set); in mxs_mem_setup_cpu_and_hbus()
199 writel(CLKCTRL_HBUS_DIV_MASK, &clkctrl_regs->hw_clkctrl_hbus_set); in mxs_mem_setup_cpu_and_hbus()
[all …]
H A Dmxs.c92 struct mxs_clkctrl_regs *clkctrl_regs = in arch_cpu_init() local
103 &clkctrl_regs->hw_clkctrl_clkseq_set); in arch_cpu_init()
106 clrsetbits_le32(&clkctrl_regs->hw_clkctrl_gpmi, in arch_cpu_init()
198 struct mxs_clkctrl_regs *clkctrl_regs = in cpu_eth_init() local
202 clrbits_le32(&clkctrl_regs->hw_clkctrl_enet, in cpu_eth_init()
208 &clkctrl_regs->hw_clkctrl_pll2ctrl0_set); in cpu_eth_init()
214 &clkctrl_regs->hw_clkctrl_pll2ctrl0_clr); in cpu_eth_init()
217 setbits_le32(&clkctrl_regs->hw_clkctrl_enet, CLKCTRL_ENET_CLK_OUT_EN); in cpu_eth_init()
H A Dspl_power_init.c32 struct mxs_clkctrl_regs *clkctrl_regs = in mxs_power_clock2xtal() local
39 &clkctrl_regs->hw_clkctrl_clkseq_set); in mxs_power_clock2xtal()
51 struct mxs_clkctrl_regs *clkctrl_regs = in mxs_power_clock2pll() local
63 setbits_le32(&clkctrl_regs->hw_clkctrl_pll0ctrl0, in mxs_power_clock2pll()
71 setbits_le32(&clkctrl_regs->hw_clkctrl_clkseq, in mxs_power_clock2pll()
/openbmc/u-boot/drivers/misc/
H A Dmxs_ocotp.c28 static struct mxs_clkctrl_regs *clkctrl_regs = variable
126 reg = readl(&clkctrl_regs->hw_clkctrl_hbus); in mxs_ocotp_wait_hclk_ready()
148 &clkctrl_regs->hw_clkctrl_clkseq_set); in mxs_ocotp_scale_hclk()
152 *val = readl(&clkctrl_regs->hw_clkctrl_hbus); in mxs_ocotp_scale_hclk()
166 &clkctrl_regs->hw_clkctrl_hbus_set); in mxs_ocotp_scale_hclk()
168 &clkctrl_regs->hw_clkctrl_hbus_clr); in mxs_ocotp_scale_hclk()
178 &clkctrl_regs->hw_clkctrl_clkseq_clr); in mxs_ocotp_scale_hclk()
/openbmc/u-boot/board/ppcag/bg0900/
H A Dbg0900.c54 struct mxs_clkctrl_regs *clkctrl_regs = in board_eth_init() local
63 &clkctrl_regs->hw_clkctrl_enet); in board_eth_init()
/openbmc/u-boot/board/schulercontrol/sc_sps_1/
H A Dsc_sps_1.c71 struct mxs_clkctrl_regs *clkctrl_regs = in board_eth_init() local
77 clrsetbits_le32(&clkctrl_regs->hw_clkctrl_enet, in board_eth_init()
/openbmc/u-boot/board/freescale/mx28evk/
H A Dmx28evk.c99 struct mxs_clkctrl_regs *clkctrl_regs = in board_eth_init() local
110 &clkctrl_regs->hw_clkctrl_enet); in board_eth_init()