Searched refs:clk_map (Results 1 – 6 of 6) sorted by relevance
143 u8 clk_map[][3] = { in cpm2_clk_setup() local236 for (i = 0; i < ARRAY_SIZE(clk_map); i++) { in cpm2_clk_setup()237 if (clk_map[i][0] == target && clk_map[i][1] == clock) { in cpm2_clk_setup()238 bits = clk_map[i][2]; in cpm2_clk_setup()242 if (i == ARRAY_SIZE(clk_map)) in cpm2_clk_setup()269 u8 clk_map[][3] = { in cpm2_smc_clk_setup() local296 for (i = 0; i < ARRAY_SIZE(clk_map); i++) { in cpm2_smc_clk_setup()297 if (clk_map[i][0] == target && clk_map[i][1] == clock) { in cpm2_smc_clk_setup()298 bits = clk_map[i][2]; in cpm2_smc_clk_setup()302 if (i == ARRAY_SIZE(clk_map)) in cpm2_smc_clk_setup()
476 u32 clk_map[4], regval; in adau7118_parset_dt() local507 clk_map, ARRAY_SIZE(clk_map)); in adau7118_parset_dt()512 for (pdm = 0; pdm < ARRAY_SIZE(clk_map); pdm++) in adau7118_parset_dt()513 _clk_map |= (clk_map[pdm] << (pdm + 4)); in adau7118_parset_dt()
465 clk_index[IN] = asrc_priv->clk_map[IN][config->inclk]; in fsl_asrc_config_pair()466 clk_index[OUT] = asrc_priv->clk_map[OUT][config->outclk]; in fsl_asrc_config_pair()677 clk_index = asrc_priv->clk_map[j][i]; in fsl_asrc_select_clk()1151 asrc_priv->clk_map[IN] = input_clk_map_imx35; in fsl_asrc_probe()1152 asrc_priv->clk_map[OUT] = output_clk_map_imx35; in fsl_asrc_probe()1154 asrc_priv->clk_map[IN] = input_clk_map_imx53; in fsl_asrc_probe()1155 asrc_priv->clk_map[OUT] = output_clk_map_imx53; in fsl_asrc_probe()1169 asrc_priv->clk_map[IN] = clk_map_imx8qm[map_idx]; in fsl_asrc_probe()1170 asrc_priv->clk_map[OUT] = clk_map_imx8qm[map_idx]; in fsl_asrc_probe()1172 asrc_priv->clk_map[IN] = clk_map_imx8qxp[map_idx]; in fsl_asrc_probe()[all …]
459 unsigned char *clk_map[2]; member
250 u8 clk_map[][3] = { in cpm1_clk_setup() local342 for (i = 0; i < ARRAY_SIZE(clk_map); i++) { in cpm1_clk_setup()343 if (clk_map[i][0] == target && clk_map[i][1] == clock) { in cpm1_clk_setup()344 bits = clk_map[i][2]; in cpm1_clk_setup()349 if (i == ARRAY_SIZE(clk_map)) { in cpm1_clk_setup()
203 static const struct clk_cfg clk_map[] = { variable684 gate_offset = clk_map[clk->id].gate_offset; in stm32_clk_get_rate()781 gate_offset = clk_map[clk_id].gate_offset; in stm32_clk_enable()782 gate_bit_index = clk_map[clk_id].gate_bit_idx; in stm32_clk_enable()786 clk_map[clk_id].name); in stm32_clk_enable()