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Searched refs:chip_cfg (Results 1 – 7 of 7) sorted by relevance

/openbmc/u-boot/drivers/phy/marvell/
H A Dcomphy_core.c51 void comphy_print(struct chip_serdes_phy_config *chip_cfg, in comphy_print() argument
56 for (lane = 0; lane < chip_cfg->comphy_lanes_count; in comphy_print()
78 struct chip_serdes_phy_config *chip_cfg = dev_get_priv(dev); in comphy_probe() local
87 chip_cfg->comphy_base_addr = (void *)devfdt_get_addr_index(dev, 0); in comphy_probe()
88 if (IS_ERR(chip_cfg->comphy_base_addr)) in comphy_probe()
89 return PTR_ERR(chip_cfg->comphy_base_addr); in comphy_probe()
91 chip_cfg->hpipe3_base_addr = (void *)devfdt_get_addr_index(dev, 1); in comphy_probe()
92 if (IS_ERR(chip_cfg->hpipe3_base_addr)) in comphy_probe()
93 return PTR_ERR(chip_cfg->hpipe3_base_addr); in comphy_probe()
95 chip_cfg->comphy_lanes_count = fdtdec_get_int(blob, node, in comphy_probe()
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H A Dcomphy_mux.c112 void comphy_mux_init(struct chip_serdes_phy_config *chip_cfg, in comphy_mux_init() argument
123 comphy_max_lanes = chip_cfg->comphy_lanes_count; in comphy_mux_init()
124 mux_data = chip_cfg->mux_data; in comphy_mux_init()
125 mux_lane_order = chip_cfg->comphy_mux_lane_order; in comphy_mux_init()
126 mux_bitcount = chip_cfg->comphy_mux_bitcount; in comphy_mux_init()
H A Dcomphy_a3700.c965 int comphy_a3700_init(struct chip_serdes_phy_config *chip_cfg, in comphy_a3700_init() argument
969 u32 comphy_max_count = chip_cfg->comphy_lanes_count; in comphy_a3700_init()
975 chip_cfg->mux_data = a3700_comphy_mux_data; in comphy_a3700_init()
976 comphy_mux_init(chip_cfg, serdes_map, COMPHY_SEL_ADDR); in comphy_a3700_init()
/openbmc/linux/drivers/scsi/
H A Dpmcraid.c4565 struct pmcraid_chip_details *chip_cfg = pinstance->chip_cfg; in pmcraid_init_instance() local
4568 pinstance->ioarrin = mapped_pci_addr + chip_cfg->ioarrin; in pmcraid_init_instance()
4571 mapped_pci_addr + chip_cfg->ioa_host_intr; in pmcraid_init_instance()
4573 mapped_pci_addr + chip_cfg->ioa_host_intr_clr; in pmcraid_init_instance()
4575 mapped_pci_addr + chip_cfg->ioa_host_msix_intr; in pmcraid_init_instance()
4577 mapped_pci_addr + chip_cfg->host_ioa_intr; in pmcraid_init_instance()
4579 mapped_pci_addr + chip_cfg->host_ioa_intr_clr; in pmcraid_init_instance()
4584 pinstance->mailbox = mapped_pci_addr + chip_cfg->mailbox; in pmcraid_init_instance()
4585 pinstance->ioa_status = mapped_pci_addr + chip_cfg->ioastatus; in pmcraid_init_instance()
4587 mapped_pci_addr + chip_cfg->ioa_host_mask; in pmcraid_init_instance()
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H A Dpmcraid.h674 struct pmcraid_chip_details *chip_cfg; member
H A Dipr.c9125 p = &ioa_cfg->chip_cfg->regs; in ipr_init_regs()
9428 ioa_cfg->chip_cfg = ioa_cfg->ipr_chip->cfg; in ipr_probe_ioa()
9429 ioa_cfg->clear_isr = ioa_cfg->chip_cfg->clear_isr; in ipr_probe_ioa()
9430 ioa_cfg->max_cmds = ioa_cfg->chip_cfg->max_cmds; in ipr_probe_ioa()
9478 ioa_cfg->ioa_mailbox = ioa_cfg->chip_cfg->mailbox + ipr_regs; in ipr_probe_ioa()
9498 ioa_cfg->chip_cfg->cache_line_size); in ipr_probe_ioa()
9840 ioa_cfg->iopoll_weight = ioa_cfg->chip_cfg->iopoll_weight; in ipr_probe()
H A Dipr.h1486 const struct ipr_chip_cfg_t *chip_cfg; member