Searched refs:cg_sel (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/drivers/clk/ux500/ |
| H A D | clk-prcmu.c | 21 u8 cg_sel; member
38 return prcmu_request_clock(clk->cg_sel, true); in clk_prcmu_prepare()
44 if (prcmu_request_clock(clk->cg_sel, false)) in clk_prcmu_unprepare()
53 return prcmu_clock_rate(clk->cg_sel); in clk_prcmu_recalc_rate()
60 return prcmu_round_clock_rate(clk->cg_sel, rate); in clk_prcmu_round_rate()
67 return prcmu_set_clock_rate(clk->cg_sel, rate); in clk_prcmu_set_rate()
87 err = prcmu_request_clock(clk->cg_sel, true); in clk_prcmu_opp_prepare()
102 if (prcmu_request_clock(clk->cg_sel, false)) { in clk_prcmu_opp_unprepare()
130 err = prcmu_request_clock(clk->cg_sel, true); in clk_prcmu_opp_volt_prepare()
144 if (prcmu_request_clock(clk->cg_sel, false)) { in clk_prcmu_opp_volt_unprepare()
[all …]
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| H A D | clk-prcc.c | 29 u32 cg_sel; member
39 writel(clk->cg_sel, (clk->base + PRCC_PCKEN)); in clk_prcc_pclk_enable()
40 while (!(readl(clk->base + PRCC_PCKSR) & clk->cg_sel)) in clk_prcc_pclk_enable()
51 writel(clk->cg_sel, (clk->base + PRCC_PCKDIS)); in clk_prcc_pclk_disable()
59 writel(clk->cg_sel, (clk->base + PRCC_KCKEN)); in clk_prcc_kclk_enable()
60 while (!(readl(clk->base + PRCC_KCKSR) & clk->cg_sel)) in clk_prcc_kclk_enable()
71 writel(clk->cg_sel, (clk->base + PRCC_KCKDIS)); in clk_prcc_kclk_disable()
96 u32 cg_sel, in clk_reg_prcc() argument
117 clk->cg_sel = cg_sel; in clk_reg_prcc()
144 u32 cg_sel, in clk_reg_prcc_pclk() argument
[all …]
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| H A D | clk.h | 21 u32 cg_sel,
27 u32 cg_sel,
32 u8 cg_sel,
38 u8 cg_sel,
43 u8 cg_sel,
49 u8 cg_sel,
54 u8 cg_sel,
59 u8 cg_sel,
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