/openbmc/qemu/target/riscv/insn_trans/ |
H A D | trans_rvvk.c.inc | 37 s->cfg_ptr->ext_zvbc == true && 57 s->cfg_ptr->ext_zvbc == true && 118 (s->cfg_ptr->ext_zvbb == true || s->cfg_ptr->ext_zvkb == true); 124 (s->cfg_ptr->ext_zvbb == true || s->cfg_ptr->ext_zvkb == true); 175 s->cfg_ptr->vlenb, s->cfg_ptr->vlenb, \ 185 return s->cfg_ptr->ext_zvbb == true && 193 return (s->cfg_ptr->ext_zvbb == true || s->cfg_ptr->ext_zvkb == true) && 208 return s->cfg_ptr->ext_zvbb && opivv_widen_check(s, a); 213 return s->cfg_ptr->ext_zvbb && opivx_widen_check(s, a); 265 simd_desc(s->cfg_ptr->vlenb, s->cfg_ptr->vlenb, data)); \ [all …]
|
H A D | trans_rvbf16.c.inc | 20 if (!ctx->cfg_ptr->ext_zfbfmin) { \ 26 if (!ctx->cfg_ptr->ext_zvfbfmin) { \ 32 if (!ctx->cfg_ptr->ext_zvfbfwma) { \ 83 ctx->cfg_ptr->vlenb, 84 ctx->cfg_ptr->vlenb, data, 108 ctx->cfg_ptr->vlenb, 109 ctx->cfg_ptr->vlenb, data, 135 ctx->cfg_ptr->vlenb, 136 ctx->cfg_ptr->vlenb, data,
|
H A D | trans_rvzfh.c.inc | 20 if (!ctx->cfg_ptr->ext_zfh) { \ 26 if (!ctx->cfg_ptr->ext_zhinx && !ctx->cfg_ptr->ext_zfh) { \ 32 if (!ctx->cfg_ptr->ext_zfhmin && !ctx->cfg_ptr->ext_zfbfmin) { \ 38 if (!(ctx->cfg_ptr->ext_zfhmin || ctx->cfg_ptr->ext_zhinxmin)) { \ 243 if (!ctx->cfg_ptr->ext_zfinx) { 251 if (!ctx->cfg_ptr->ext_zfinx) { 280 if (!ctx->cfg_ptr->ext_zfinx) { 292 if (!ctx->cfg_ptr->ext_zfinx) { 309 if (ctx->cfg_ptr->ext_zfinx) { 327 if (!ctx->cfg_ptr->ext_zfinx) { [all …]
|
H A D | trans_rvv.c.inc | 43 return s->cfg_ptr->ext_zvfh; 45 return s->cfg_ptr->ext_zve32f; 47 return s->cfg_ptr->ext_zve64d; 61 return s->cfg_ptr->ext_zvfhmin; 63 return s->cfg_ptr->ext_zve32f; 77 return s->cfg_ptr->ext_zvfh; 79 return s->cfg_ptr->ext_zve32f; 81 return s->cfg_ptr->ext_zve64d; 95 return s->cfg_ptr->ext_zve32f; 97 return s->cfg_ptr->ext_zve64d; [all …]
|
H A D | trans_rvf.c.inc | 23 ctx->virt_inst_excp = ctx->virt_enabled && ctx->cfg_ptr->ext_zfinx; \ 29 if (!ctx->cfg_ptr->ext_zfinx) { \ 35 if (!ctx->cfg_ptr->ext_zcf) { \ 51 if (ctx->cfg_ptr->ext_zama16b) { 73 if (ctx->cfg_ptr->ext_zama16b) { 251 if (!ctx->cfg_ptr->ext_zfinx) { 259 if (!ctx->cfg_ptr->ext_zfinx) { 288 if (!ctx->cfg_ptr->ext_zfinx) { 298 if (!ctx->cfg_ptr->ext_zfinx) { 314 if (ctx->cfg_ptr->ext_zfinx) { [all …]
|
H A D | trans_rvzicbo.c.inc | 20 if (!ctx->cfg_ptr->ext_zicbom) { \ 26 if (!ctx->cfg_ptr->ext_zicboz) { \
|
H A D | trans_rvzawrs.c.inc | 21 if (!ctx->cfg_ptr->ext_zawrs) { 45 if (!ctx->cfg_ptr->ext_zawrs) {
|
H A D | trans_rvk.c.inc | 21 if (!ctx->cfg_ptr->ext_zknd) { \ 27 if (!ctx->cfg_ptr->ext_zkne) { \ 33 if (!ctx->cfg_ptr->ext_zknh) { \ 39 if (!ctx->cfg_ptr->ext_zksed) { \ 45 if (!ctx->cfg_ptr->ext_zksh) { \
|
H A D | trans_rvb.c.inc | 22 if (!ctx->cfg_ptr->ext_zba) { \ 28 if (!ctx->cfg_ptr->ext_zbb) { \ 34 if (!ctx->cfg_ptr->ext_zbc) { \ 40 if (!ctx->cfg_ptr->ext_zbs) { \ 46 if (!ctx->cfg_ptr->ext_zbkb) { \ 52 if (!ctx->cfg_ptr->ext_zbkx) { \
|
H A D | trans_xthead.c.inc | 20 if (!ctx->cfg_ptr->ext_xtheadba) { \ 26 if (!ctx->cfg_ptr->ext_xtheadbb) { \ 32 if (!ctx->cfg_ptr->ext_xtheadbs) { \ 38 if (!ctx->cfg_ptr->ext_xtheadcmo) { \ 44 if (!ctx->cfg_ptr->ext_xtheadcondmov) { \ 50 if (!ctx->cfg_ptr->ext_xtheadfmemidx) { \ 56 if (!ctx->cfg_ptr->ext_xtheadfmv) { \ 62 if (!ctx->cfg_ptr->ext_xtheadmac) { \ 68 if (!ctx->cfg_ptr->ext_xtheadmemidx) { \ 74 if (!ctx->cfg_ptr->ext_xtheadmempair) { \ [all …]
|
H A D | trans_rvzce.c.inc | 20 if (!ctx->cfg_ptr->ext_zcb) \ 25 if (!ctx->cfg_ptr->ext_zcmp) \ 30 if (!ctx->cfg_ptr->ext_zcmt) \
|
H A D | trans_rvzcmop.c.inc | 20 if (!ctx->cfg_ptr->ext_zcmop) { \
|
H A D | trans_rvzimop.c.inc | 20 if (!ctx->cfg_ptr->ext_zimop) { \
|
H A D | trans_rvd.c.inc | 22 if (!ctx->cfg_ptr->ext_zdinx) { \ 28 if (ctx->cfg_ptr->ext_zdinx && (get_xl(ctx) == MXL_RV32) && \ 35 if (!ctx->cfg_ptr->ext_zcd) { \ 58 } else if (ctx->cfg_ptr->ext_zama16b) { 82 } else if (ctx->cfg_ptr->ext_zama16b) {
|
H A D | trans_rvzicond.c.inc | 21 if (!ctx->cfg_ptr->ext_zicond) { \
|
H A D | trans_svinval.c.inc | 20 if (!ctx->cfg_ptr->ext_svinval) { \
|
H A D | trans_rva.c.inc | 22 if (!ctx->cfg_ptr->ext_zaamo && !has_ext(ctx, RVA)) { \ 28 if (!ctx->cfg_ptr->ext_zalrsc && !has_ext(ctx, RVA)) { \
|
H A D | trans_rvi.c.inc | 109 if (!has_ext(ctx, RVC) && !ctx->cfg_ptr->ext_zca) { 239 if (!has_ext(ctx, RVC) && !ctx->cfg_ptr->ext_zca && 326 if (ctx->cfg_ptr->ext_zama16b) { 427 if (ctx->cfg_ptr->ext_zama16b) { 851 if (!ctx->cfg_ptr->ext_zihintpause) { 875 if (!ctx->cfg_ptr->ext_zifencei) {
|
H A D | trans_rvzabha.c.inc | 20 if (!ctx->cfg_ptr->ext_zabha) { \
|
H A D | trans_rvzacas.c.inc | 20 if (!ctx->cfg_ptr->ext_zacas) { \
|
H A D | trans_rvzfa.c.inc | 20 if (!ctx->cfg_ptr->ext_zfa) { \ 26 if (!ctx->cfg_ptr->ext_zfh) { \
|
H A D | trans_rvm.c.inc | 22 if (!ctx->cfg_ptr->ext_zmmul && !has_ext(ctx, RVM)) { \
|
/openbmc/qemu/target/riscv/ |
H A D | translate.c | 84 const RISCVCPUConfig *cfg_ptr; member 442 if (!ctx->cfg_ptr->ext_zfinx) { in get_fpr_hs() 469 if (!ctx->cfg_ptr->ext_zfinx) { in get_fpr_d() 494 if (!ctx->cfg_ptr->ext_zfinx) { in dest_fpr() 517 if (!ctx->cfg_ptr->ext_zfinx) { in gen_set_fpr_hs() 541 if (!ctx->cfg_ptr->ext_zfinx) { in gen_set_fpr_d() 571 if (!has_ext(ctx, RVC) && !ctx->cfg_ptr->ext_zca) { in gen_jal() 769 if (!ctx->cfg_ptr->ext_##A && \ 770 !ctx->cfg_ptr->ext_##B) { \ 1096 if (ctx->cfg_ptr->ext_zama16b && size >= MO_32) { in gen_amo() [all …]
|
/openbmc/linux/drivers/vdpa/solidrun/ |
H A D | snet_main.c | 468 void __iomem *cfg_ptr = snet->cfg->virtio_cfg + offset; in snet_get_config() local 478 *buf_ptr++ = ioread8(cfg_ptr + i); in snet_get_config() 485 void __iomem *cfg_ptr = snet->cfg->virtio_cfg + offset; in snet_set_config() local 495 iowrite8(*buf_ptr++, cfg_ptr + i); in snet_set_config()
|
/openbmc/linux/drivers/net/ethernet/intel/i40e/ |
H A D | i40e_adminq.c | 582 u16 cfg_ptr, oem_hi, oem_lo; in i40e_init_adminq() local 644 i40e_read_nvm_word(hw, I40E_SR_BOOT_CONFIG_PTR, &cfg_ptr); in i40e_init_adminq() 645 i40e_read_nvm_word(hw, (cfg_ptr + I40E_NVM_OEM_VER_OFF), in i40e_init_adminq() 647 i40e_read_nvm_word(hw, (cfg_ptr + (I40E_NVM_OEM_VER_OFF + 1)), in i40e_init_adminq()
|