/openbmc/u-boot/arch/arm/cpu/armv7/ |
H A D | cache_v7.c | 23 u32 ccsidr; in get_ccsidr() local 26 asm volatile ("mrc p15, 1, %0, c0, c0, 0" : "=r" (ccsidr)); in get_ccsidr() 27 return ccsidr; in get_ccsidr() 57 u32 line_len, ccsidr; in v7_dcache_maint_range() local 59 ccsidr = get_ccsidr(); in v7_dcache_maint_range() 60 line_len = ((ccsidr & CCSIDR_LINE_SIZE_MASK) >> in v7_dcache_maint_range()
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/openbmc/qemu/target/arm/tcg/ |
H A D | cpu64.c | 84 cpu->ccsidr[0] = make_ccsidr(CCSIDR_FORMAT_LEGACY, 4, 64, 32 * KiB, 7); in aarch64_a35_initfn() 86 cpu->ccsidr[1] = make_ccsidr(CCSIDR_FORMAT_LEGACY, 4, 64, 32 * KiB, 2); in aarch64_a35_initfn() 88 cpu->ccsidr[2] = make_ccsidr(CCSIDR_FORMAT_LEGACY, 16, 64, 512 * KiB, 7); in aarch64_a35_initfn() 253 cpu->ccsidr[0] = make_ccsidr(CCSIDR_FORMAT_LEGACY, 4, 64, 32 * KiB, 7); in aarch64_a55_initfn() 255 cpu->ccsidr[1] = make_ccsidr(CCSIDR_FORMAT_LEGACY, 4, 64, 32 * KiB, 2); in aarch64_a55_initfn() 257 cpu->ccsidr[2] = make_ccsidr(CCSIDR_FORMAT_LEGACY, 16, 64, 512 * KiB, 7); in aarch64_a55_initfn() 322 cpu->ccsidr[0] = make_ccsidr(CCSIDR_FORMAT_LEGACY, 4, 64, 32 * KiB, 7); in aarch64_a72_initfn() 324 cpu->ccsidr[1] = make_ccsidr(CCSIDR_FORMAT_LEGACY, 3, 64, 48 * KiB, 2); in aarch64_a72_initfn() 326 cpu->ccsidr[2] = make_ccsidr(CCSIDR_FORMAT_LEGACY, 16, 64, 1 * MiB, 7); in aarch64_a72_initfn() 384 cpu->ccsidr[0] = make_ccsidr(CCSIDR_FORMAT_LEGACY, 4, 64, 64 * KiB, 7); in aarch64_a76_initfn() [all …]
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H A D | cpu32.c | 375 cpu->ccsidr[0] = 0xe007e01a; /* 16k L1 dcache. */ in cortex_a8_initfn() 376 cpu->ccsidr[1] = 0x2007e01a; /* 16k L1 icache. */ in cortex_a8_initfn() 377 cpu->ccsidr[2] = 0xf0000000; /* No L2 icache. */ in cortex_a8_initfn() 450 cpu->ccsidr[0] = 0xe00fe019; /* 16k L1 dcache. */ in cortex_a9_initfn() 451 cpu->ccsidr[1] = 0x200fe019; /* 16k L1 icache. */ in cortex_a9_initfn() 521 cpu->ccsidr[0] = 0x701fe00a; /* 32K L1 dcache */ in cortex_a7_initfn() 522 cpu->ccsidr[1] = 0x201fe00a; /* 32K L1 icache */ in cortex_a7_initfn() 523 cpu->ccsidr[2] = 0x711fe07a; /* 4096K L2 unified cache */ in cortex_a7_initfn() 568 cpu->ccsidr[0] = 0x701fe00a; /* 32K L1 dcache */ in cortex_a15_initfn() 569 cpu->ccsidr[1] = 0x201fe00a; /* 32K L1 icache */ in cortex_a15_initfn() [all …]
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/openbmc/qemu/target/arm/ |
H A D | cpu-features.h | 1047 uint64_t ccsidr = 0; in make_ccsidr() local 1065 ccsidr = deposit32(ccsidr, 28, 4, flags); in make_ccsidr() 1066 ccsidr = deposit32(ccsidr, 13, 15, sets - 1); in make_ccsidr() 1067 ccsidr = deposit32(ccsidr, 3, 10, assoc - 1); in make_ccsidr() 1068 ccsidr = deposit32(ccsidr, 0, 3, lg_linesize - 4); in make_ccsidr() 1077 ccsidr = deposit64(ccsidr, 32, 24, sets - 1); in make_ccsidr() 1078 ccsidr = deposit64(ccsidr, 3, 21, assoc - 1); in make_ccsidr() 1079 ccsidr = deposit64(ccsidr, 0, 3, lg_linesize - 4); in make_ccsidr() 1082 return ccsidr; in make_ccsidr()
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H A D | cpu64.c | 647 cpu->ccsidr[0] = make_ccsidr(CCSIDR_FORMAT_LEGACY, 4, 64, 32 * KiB, 7); in aarch64_a57_initfn() 649 cpu->ccsidr[1] = make_ccsidr(CCSIDR_FORMAT_LEGACY, 3, 64, 48 * KiB, 2); in aarch64_a57_initfn() 651 cpu->ccsidr[2] = make_ccsidr(CCSIDR_FORMAT_LEGACY, 16, 64, 2 * MiB, 7); in aarch64_a57_initfn() 708 cpu->ccsidr[0] = make_ccsidr(CCSIDR_FORMAT_LEGACY, 4, 64, 32 * KiB, 7); in aarch64_a53_initfn() 710 cpu->ccsidr[1] = make_ccsidr(CCSIDR_FORMAT_LEGACY, 1, 64, 32 * KiB, 2); in aarch64_a53_initfn() 712 cpu->ccsidr[2] = make_ccsidr(CCSIDR_FORMAT_LEGACY, 16, 64, 1 * MiB, 7); in aarch64_a53_initfn()
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H A D | cpu.h | 1052 uint64_t ccsidr[16]; member 2389 QEMU_BUILD_BUG_ON(ARRAY_SIZE(((ARMCPU *)0)->ccsidr) <= R_V7M_CSSELR_INDEX_MASK);
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H A D | helper.c | 2007 return cpu->ccsidr[index]; in ccsidr_read()
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/openbmc/linux/arch/arm64/kvm/ |
H A D | sys_regs.c | 122 if (vcpu->arch.ccsidr) in get_ccsidr() 123 return vcpu->arch.ccsidr[csselr]; in get_ccsidr() 156 u32 *ccsidr = vcpu->arch.ccsidr; in set_ccsidr() local 163 if (!ccsidr) { in set_ccsidr() 167 ccsidr = kmalloc_array(CSSELR_MAX, sizeof(u32), GFP_KERNEL_ACCOUNT); in set_ccsidr() 168 if (!ccsidr) in set_ccsidr() 172 ccsidr[i] = get_ccsidr(vcpu, i); in set_ccsidr() 174 vcpu->arch.ccsidr = ccsidr; in set_ccsidr() 177 ccsidr[csselr] = val; in set_ccsidr()
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H A D | reset.c | 164 kfree(vcpu->arch.ccsidr); in kvm_arm_vcpu_destroy()
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/openbmc/linux/arch/arm64/include/asm/ |
H A D | kvm_host.h | 591 u32 *ccsidr; member
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/openbmc/qemu/hw/intc/ |
H A D | armv7m_nvic.c | 1339 return cpu->ccsidr[idx]; in nvic_readl()
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