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Searched refs:cci (Results 1 – 25 of 76) sorted by relevance

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/openbmc/linux/drivers/i2c/busses/
H A Di2c-qcom-cci.c108 struct cci;
116 struct cci *cci; member
127 struct cci { struct
139 struct cci *cci = dev; in cci_isr() argument
143 val = readl(cci->base + CCI_IRQ_STATUS_0); in cci_isr()
144 writel(val, cci->base + CCI_IRQ_CLEAR_0); in cci_isr()
145 writel(0x1, cci->base + CCI_IRQ_GLOBAL_CLEAR_CMD); in cci_isr()
148 complete(&cci->master[0].irq_complete); in cci_isr()
149 if (cci->master[1].master) in cci_isr()
150 complete(&cci->master[1].irq_complete); in cci_isr()
[all …]
/openbmc/qemu/hw/cxl/
H A Dcxl-mailbox-utils.c129 CXLCCI *cci) in cmd_tunnel_management_cmd() argument
182 if (object_dynamic_cast(OBJECT(cci->d), TYPE_CXL_TYPE3)) { in cmd_tunnel_management_cmd()
183 CXLType3Dev *ct3d = CXL_TYPE3(cci->d); in cmd_tunnel_management_cmd()
189 } else if (object_dynamic_cast(OBJECT(cci->d), TYPE_CXL_USP)) { in cmd_tunnel_management_cmd()
190 CXLUpstreamPort *usp = CXL_USP(cci->d); in cmd_tunnel_management_cmd()
237 CXLCCI *cci) in cmd_events_get_records() argument
239 CXLDeviceState *cxlds = &CXL_TYPE3(cci->d)->cxl_dstate; in cmd_events_get_records()
266 CXLCCI *cci) in cmd_events_clear_records() argument
268 CXLDeviceState *cxlds = &CXL_TYPE3(cci->d)->cxl_dstate; in cmd_events_clear_records()
287 CXLCCI *cci) in cmd_events_get_interrupt_policy() argument
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H A Dcxl-device-utils.c66 CXLCCI *cci = opaque; in mailbox_reg_read() local
68 if (object_dynamic_cast(OBJECT(cci->intf), TYPE_CXL_TYPE3)) { in mailbox_reg_read()
69 cxl_dstate = &CXL_TYPE3(cci->intf)->cxl_dstate; in mailbox_reg_read()
70 } else if (object_dynamic_cast(OBJECT(cci->intf), in mailbox_reg_read()
72 cxl_dstate = &CXL_SWITCH_MAILBOX_CCI(cci->intf)->cxl_dstate; in mailbox_reg_read()
88 cci->bg.opcode); in mailbox_reg_read()
90 PERCENTAGE_COMP, cci->bg.complete_pct); in mailbox_reg_read()
92 RET_CODE, cci->bg.ret_code); in mailbox_reg_read()
98 if (cci->bg.complete_pct) { in mailbox_reg_read()
155 CXLCCI *cci = opaque; in mailbox_reg_write() local
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H A Dswitch-mailbox-cci.c43 cswmb->cci = &usp->swcci; in cswbcci_realize()
44 cxl_device_register_block_init(OBJECT(pci_dev), cxl_dstate, cswmb->cci); in cswbcci_realize()
58 cxl_initialize_mailbox_swcci(cswmb->cci, DEVICE(pci_dev), in cswbcci_realize()
/openbmc/u-boot/arch/arm/cpu/armv7/ls102xa/
H A Dsoc.c111 struct ccsr_cci400 __iomem *cci = (void *)(CONFIG_SYS_IMMR + in erratum_a008850_early() local
116 out_le32(&cci->ctrl_ord, CCI400_CTRLORD_TERM_BARRIER); in erratum_a008850_early()
127 struct ccsr_cci400 __iomem *cci = (void *)(CONFIG_SYS_IMMR + in erratum_a008850_post() local
133 out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER); in erratum_a008850_post()
162 struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR + in arch_soc_init() local
185 out_le32(&cci->slave[0].snoop_ctrl, in arch_soc_init()
187 out_le32(&cci->slave[1].snoop_ctrl, in arch_soc_init()
189 out_le32(&cci->slave[2].snoop_ctrl, in arch_soc_init()
191 out_le32(&cci->slave[4].snoop_ctrl, in arch_soc_init()
200 out_le32(&cci->slave[1].sha_ord, CCI400_SHAORD_NON_SHAREABLE); in arch_soc_init()
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/openbmc/linux/drivers/usb/typec/ucsi/
H A Dtrace.c36 const char *ucsi_cci_str(u32 cci) in ucsi_cci_str() argument
38 if (UCSI_CCI_CONNECTOR(cci)) { in ucsi_cci_str()
39 if (cci & UCSI_CCI_ACK_COMPLETE) in ucsi_cci_str()
41 if (cci & UCSI_CCI_COMMAND_COMPLETE) in ucsi_cci_str()
45 if (cci & UCSI_CCI_ACK_COMPLETE) in ucsi_cci_str()
47 if (cci & UCSI_CCI_COMMAND_COMPLETE) in ucsi_cci_str()
H A Ducsi_acpi.c195 u32 cci; in ucsi_acpi_notify() local
198 ret = ua->ucsi->ops->read(ua->ucsi, UCSI_CCI, &cci, sizeof(cci)); in ucsi_acpi_notify()
202 if (UCSI_CCI_CONNECTOR(cci) && in ucsi_acpi_notify()
204 ucsi_connector_change(ua->ucsi, UCSI_CCI_CONNECTOR(cci)); in ucsi_acpi_notify()
206 if (cci & UCSI_CCI_ACK_COMPLETE && test_bit(ACK_PENDING, &ua->flags)) in ucsi_acpi_notify()
208 if (cci & UCSI_CCI_COMMAND_COMPLETE && in ucsi_acpi_notify()
H A Ducsi.c131 u32 cci; in ucsi_exec_command() local
138 ret = ucsi->ops->read(ucsi, UCSI_CCI, &cci, sizeof(cci)); in ucsi_exec_command()
142 if (cmd != UCSI_CANCEL && cci & UCSI_CCI_BUSY) in ucsi_exec_command()
145 if (!(cci & UCSI_CCI_COMMAND_COMPLETE)) in ucsi_exec_command()
148 if (cci & UCSI_CCI_NOT_SUPPORTED) { in ucsi_exec_command()
155 if (cci & UCSI_CCI_ERROR) { in ucsi_exec_command()
166 if (cmd == UCSI_CANCEL && cci & UCSI_CCI_CANCEL_COMPLETE) { in ucsi_exec_command()
171 return UCSI_CCI_LENGTH(cci); in ucsi_exec_command()
990 u32 cci; in ucsi_reset_ppm() local
995 ret = ucsi->ops->read(ucsi, UCSI_CCI, &cci, sizeof(cci)); in ucsi_reset_ppm()
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H A Ducsi_glink.c251 u32 cci; in pmic_glink_ucsi_notify() local
254 ret = pmic_glink_ucsi_read(ucsi->ucsi, UCSI_CCI, &cci, sizeof(cci)); in pmic_glink_ucsi_notify()
260 con_num = UCSI_CCI_CONNECTOR(cci); in pmic_glink_ucsi_notify()
265 (cci & (UCSI_CCI_ACK_COMPLETE | UCSI_CCI_COMMAND_COMPLETE))) { in pmic_glink_ucsi_notify()
H A Ducsi_stm32g0.c428 u32 cci; in ucsi_stm32g0_irq_handler() local
434 ret = ucsi_stm32g0_read(g0->ucsi, UCSI_CCI, &cci, sizeof(cci)); in ucsi_stm32g0_irq_handler()
438 if (UCSI_CCI_CONNECTOR(cci)) in ucsi_stm32g0_irq_handler()
439 ucsi_connector_change(g0->ucsi, UCSI_CCI_CONNECTOR(cci)); in ucsi_stm32g0_irq_handler()
441 if (cci & UCSI_CCI_ACK_COMPLETE && test_and_clear_bit(ACK_PENDING, &g0->flags)) in ucsi_stm32g0_irq_handler()
443 if (cci & UCSI_CCI_COMMAND_COMPLETE && test_and_clear_bit(COMMAND_PENDING, &g0->flags)) in ucsi_stm32g0_irq_handler()
/openbmc/linux/arch/ia64/kernel/
H A Dtopology.c110 pal_cache_config_info_t cci; member
173 return sprintf(buf, "%u\n", 1 << this_leaf->cci.pcci_line_size); in show_coherency_line_size()
179 return sprintf(buf, "%u\n", this_leaf->cci.pcci_assoc); in show_ways_of_associativity()
186 cache_mattrib[this_leaf->cci.pcci_cache_attr]); in show_attributes()
191 return sprintf(buf, "%uK\n", this_leaf->cci.pcci_cache_size / 1024); in show_size()
196 unsigned number_of_sets = this_leaf->cci.pcci_cache_size; in show_number_of_sets()
197 number_of_sets /= this_leaf->cci.pcci_assoc; in show_number_of_sets()
198 number_of_sets /= 1 << this_leaf->cci.pcci_line_size; in show_number_of_sets()
215 int type = this_leaf->type + this_leaf->cci.pcci_unified; in show_type()
297 pal_cache_config_info_t cci; in cpu_cache_sysfs_init() local
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H A Dpalinfo.c215 pal_cache_config_info_t cci; in cache_info() local
230 if ((status=ia64_pal_cache_config_info(i,j, &cci)) != 0) in cache_info()
237 cache_types[j+cci.pcci_unified], i+1, in cache_info()
238 cci.pcci_cache_size); in cache_info()
240 if (cci.pcci_unified) in cache_info()
243 seq_printf(m, "%s\n", cache_mattrib[cci.pcci_cache_attr]); in cache_info()
249 cci.pcci_assoc, in cache_info()
250 1<<cci.pcci_line_size, in cache_info()
251 1<<cci.pcci_stride); in cache_info()
256 cci.pcci_st_latency); in cache_info()
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H A Dsetup.c879 pal_cache_config_info_t cci; in get_cache_info() local
896 status = ia64_pal_cache_config_info(l, 2, &cci); in get_cache_info()
903 cci.pcci_stride = I_CACHE_STRIDE_SHIFT; in get_cache_info()
906 cci.pcci_unified = 1; in get_cache_info()
908 if (cci.pcci_stride < ia64_cache_stride_shift) in get_cache_info()
909 ia64_cache_stride_shift = cci.pcci_stride; in get_cache_info()
911 line_size = 1 << cci.pcci_line_size; in get_cache_info()
916 if (!cci.pcci_unified) { in get_cache_info()
918 status = ia64_pal_cache_config_info(l, 1, &cci); in get_cache_info()
924 cci.pcci_stride = I_CACHE_STRIDE_SHIFT; in get_cache_info()
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/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos5420-cpus.dtsi63 cci-control-port = <&cci_control1>;
75 cci-control-port = <&cci_control1>;
87 cci-control-port = <&cci_control1>;
99 cci-control-port = <&cci_control1>;
111 cci-control-port = <&cci_control0>;
123 cci-control-port = <&cci_control0>;
135 cci-control-port = <&cci_control0>;
147 cci-control-port = <&cci_control0>;
H A Dexynos5422-cpus.dtsi62 cci-control-port = <&cci_control0>;
75 cci-control-port = <&cci_control0>;
88 cci-control-port = <&cci_control0>;
101 cci-control-port = <&cci_control0>;
114 cci-control-port = <&cci_control1>;
127 cci-control-port = <&cci_control1>;
140 cci-control-port = <&cci_control1>;
153 cci-control-port = <&cci_control1>;
H A Dexynos5260.dtsi67 cci-control-port = <&cci_control1>;
74 cci-control-port = <&cci_control1>;
81 cci-control-port = <&cci_control0>;
88 cci-control-port = <&cci_control0>;
95 cci-control-port = <&cci_control0>;
102 cci-control-port = <&cci_control0>;
355 cci: cci@10f00000 { label
356 compatible = "arm,cci-400";
363 compatible = "arm,cci-400-ctrl-if";
369 compatible = "arm,cci-400-ctrl-if";
/openbmc/qemu/include/hw/cxl/
H A Dcxl_device.h142 CXLCCI *cci);
262 CXLCCI *cci);
315 void cxl_initialize_mailbox_t3(CXLCCI *cci, DeviceState *d, size_t payload_max);
316 void cxl_initialize_mailbox_swcci(CXLCCI *cci, DeviceState *intf,
318 void cxl_init_cci(CXLCCI *cci, size_t payload_max);
319 void cxl_add_cci_commands(CXLCCI *cci, const struct cxl_cmd (*cxl_cmd_set)[256],
321 int cxl_process_cci_message(CXLCCI *cci, uint8_t set, uint8_t cmd,
325 void cxl_initialize_t3_fm_owned_ld_mctpcci(CXLCCI *cci, DeviceState *d,
329 void cxl_initialize_t3_ld_cci(CXLCCI *cci, DeviceState *d,
420 static inline bool scan_media_running(CXLCCI *cci) in scan_media_running() argument
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/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt6795.dtsi36 cci-control-port = <&cci_control2>;
45 cci-control-port = <&cci_control2>;
60 cci-control-port = <&cci_control2>;
75 cci-control-port = <&cci_control2>;
90 cci-control-port = <&cci_control1>;
105 cci-control-port = <&cci_control1>;
120 cci-control-port = <&cci_control1>;
135 cci-control-port = <&cci_control1>;
450 cci: cci@10390000 { label
451 compatible = "arm,cci-400";
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/openbmc/linux/Documentation/devicetree/bindings/cpufreq/
H A Dcpufreq-mediatek.txt23 - mediatek,cci:
24 Used to confirm the link status between cpufreq and mediatek cci. Because
25 cpufreq and mediatek cci could share the same regulator in some MediaTek SoCs.
27 property to make sure mediatek cci is ready.
28 For details of mediatek cci, please refer to
29 Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml
/openbmc/linux/arch/arm/boot/dts/arm/
H A Dvexpress-v2p-ca15_a7.dts42 cci-control-port = <&cci_control1>;
52 cci-control-port = <&cci_control1>;
62 cci-control-port = <&cci_control2>;
72 cci-control-port = <&cci_control2>;
82 cci-control-port = <&cci_control2>;
161 cci@2c090000 {
162 compatible = "arm,cci-400";
169 compatible = "arm,cci-400-ctrl-if";
175 compatible = "arm,cci-400-ctrl-if";
181 compatible = "arm,cci-400-pmu,r0";
/openbmc/linux/arch/arm/boot/dts/mediatek/
H A Dmt7629.dtsi32 cci-control-port = <&cci_control2>;
40 cci-control-port = <&cci_control2>;
174 cci: cci@10390000 { label
175 compatible = "arm,cci-400";
182 compatible = "arm,cci-400-ctrl-if";
188 compatible = "arm,cci-400-ctrl-if";
194 compatible = "arm,cci-400-ctrl-if";
200 compatible = "arm,cci-400-pmu,r1";
/openbmc/u-boot/board/freescale/ls1012afrdm/
H A Dls1012afrdm.c160 struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR + in board_init() local
168 out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER); in board_init()
/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
H A Dsoc.c413 struct ccsr_cci400 __iomem *cci = (void *)(CONFIG_SYS_IMMR + in erratum_a008850_early() local
422 out_le32(&cci->ctrl_ord, CCI400_CTRLORD_TERM_BARRIER); in erratum_a008850_early()
433 struct ccsr_cci400 __iomem *cci = (void *)(CONFIG_SYS_IMMR + in erratum_a008850_post() local
443 out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER); in erratum_a008850_post()
593 struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR + in fsl_lsch2_early_init_f() local
619 out_le32(&cci->slave[4].snoop_ctrl, in fsl_lsch2_early_init_f()
/openbmc/u-boot/arch/arm/dts/
H A Dsun8i-a83t.dtsi69 cci-control-port = <&cci_control0>;
78 cci-control-port = <&cci_control0>;
87 cci-control-port = <&cci_control0>;
96 cci-control-port = <&cci_control0>;
107 cci-control-port = <&cci_control1>;
116 cci-control-port = <&cci_control1>;
125 cci-control-port = <&cci_control1>;
134 cci-control-port = <&cci_control1>;
373 cci@1790000 {
374 compatible = "arm,cci-400";
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H A Dsun9i-a80.dtsi66 cci-control-port = <&cci_control0>;
75 cci-control-port = <&cci_control0>;
84 cci-control-port = <&cci_control0>;
93 cci-control-port = <&cci_control0>;
102 cci-control-port = <&cci_control1>;
111 cci-control-port = <&cci_control1>;
120 cci-control-port = <&cci_control1>;
129 cci-control-port = <&cci_control1>;
488 cci: cci@1c90000 { label
489 compatible = "arm,cci-400";
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