Home
last modified time | relevance | path

Searched refs:cache_level (Results 1 – 25 of 27) sorted by relevance

12

/openbmc/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_crat.c57 .cache_level = 1,
66 .cache_level = 1,
75 .cache_level = 1,
90 .cache_level = 1,
99 .cache_level = 1,
108 .cache_level = 1,
137 .cache_level = 1,
146 .cache_level = 1,
155 .cache_level = 1,
164 .cache_level = 2,
[all …]
H A Dkfd_crat.h166 uint8_t cache_level; member
303 uint32_t cache_level; member
H A Dkfd_topology.h97 uint32_t cache_level; member
H A Dkfd_topology.c354 sysfs_show_32bit_prop(buffer, offs, "level", cache->cache_level); in kfd_cache_show()
1564 pcache->cache_level = pcache_info[cache_type].cache_level; in fill_in_l1_pcache()
1630 pcache->cache_level = pcache_info[cache_type].cache_level; in fill_in_l2_l3_pcache()
1714 if (pcache_info[ct].cache_level == 1) { in kfd_fill_cache_non_crat_info()
/openbmc/linux/arch/arm/mm/
H A Dcache-uniphier.c316 unsigned int *cache_level) in __uniphier_cache_init() argument
325 *cache_level); in __uniphier_cache_init()
330 pr_err("L%d: cache-level is not specified\n", *cache_level); in __uniphier_cache_init()
334 if (level != *cache_level) { in __uniphier_cache_init()
336 *cache_level, level); in __uniphier_cache_init()
341 pr_err("L%d: cache-unified is not specified\n", *cache_level); in __uniphier_cache_init()
352 *cache_level); in __uniphier_cache_init()
360 *cache_level); in __uniphier_cache_init()
368 *cache_level); in __uniphier_cache_init()
378 pr_err("L%d: failed to map control register\n", *cache_level); in __uniphier_cache_init()
[all …]
H A Dcache-l2x0.c1767 u32 cache_level = 2; in l2x0_of_init() local
1801 if (of_property_read_u32(np, "cache-level", &cache_level)) in l2x0_of_init()
1804 if (cache_level != 2) in l2x0_of_init()
/openbmc/qemu/hw/acpi/
H A Dhmat.c204 int i, hierarchy, type, cache_level, total_levels; in hmat_build_table_structs() local
256 for (cache_level = 1; cache_level < HMAT_LB_LEVELS; cache_level++) { in hmat_build_table_structs()
257 if (numa_state->hmat_cache[i][cache_level]) { in hmat_build_table_structs()
261 for (cache_level = 0; cache_level <= total_levels; cache_level++) { in hmat_build_table_structs()
262 hmat_cache = numa_state->hmat_cache[i][cache_level]; in hmat_build_table_structs()
/openbmc/linux/drivers/gpu/drm/i915/gem/selftests/
H A Dhuge_gem_object.c107 unsigned int cache_level; in huge_gem_object() local
126 cache_level = HAS_LLC(i915) ? I915_CACHE_LLC : I915_CACHE_NONE; in huge_gem_object()
127 i915_gem_object_set_cache_coherency(obj, cache_level); in huge_gem_object()
H A Dhuge_pages.c180 unsigned int cache_level; in huge_pages_object() local
203 cache_level = HAS_LLC(i915) ? I915_CACHE_LLC : I915_CACHE_NONE; in huge_pages_object()
204 i915_gem_object_set_cache_coherency(obj, cache_level); in huge_pages_object()
/openbmc/linux/drivers/gpu/drm/i915/gem/
H A Di915_gem_internal.c145 unsigned int cache_level; in __i915_gem_object_create_internal() local
173 cache_level = HAS_LLC(i915) ? I915_CACHE_LLC : I915_CACHE_NONE; in __i915_gem_object_create_internal()
174 i915_gem_object_set_cache_coherency(obj, cache_level); in __i915_gem_object_create_internal()
H A Di915_gem_domain.h13 enum i915_cache_level cache_level);
H A Di915_gem_shmem.c586 unsigned int cache_level; in shmem_object_init() local
630 cache_level = I915_CACHE_LLC; in shmem_object_init()
632 cache_level = I915_CACHE_NONE; in shmem_object_init()
634 i915_gem_object_set_cache_coherency(obj, cache_level); in shmem_object_init()
H A Di915_gem_ttm_move.c105 unsigned int cache_level; in i915_ttm_adjust_gem_after_move() local
119 cache_level = I915_CACHE_NONE; in i915_ttm_adjust_gem_after_move()
124 cache_level = i915_ttm_cache_level(to_i915(bo->base.dev), bo->resource, in i915_ttm_adjust_gem_after_move()
150 i915_gem_object_set_cache_coherency(obj, cache_level); in i915_ttm_adjust_gem_after_move()
H A Di915_gem_domain.c271 enum i915_cache_level cache_level) in i915_gem_object_set_cache_level() argument
281 if (i915_gem_object_has_cache_level(obj, cache_level)) in i915_gem_object_set_cache_level()
292 i915_gem_object_set_cache_coherency(obj, cache_level); in i915_gem_object_set_cache_level()
H A Di915_gem_object.c150 unsigned int cache_level) in i915_gem_object_set_cache_coherency() argument
154 obj->pat_index = i915_gem_get_pat_index(i915, cache_level); in i915_gem_object_set_cache_coherency()
156 if (cache_level != I915_CACHE_NONE) in i915_gem_object_set_cache_coherency()
H A Di915_gem_stolen.c682 unsigned int cache_level; in __i915_gem_object_create_stolen() local
697 cache_level = HAS_LLC(mem->i915) ? I915_CACHE_LLC : I915_CACHE_NONE; in __i915_gem_object_create_stolen()
698 i915_gem_object_set_cache_coherency(obj, cache_level); in __i915_gem_object_create_stolen()
H A Di915_gem_object.h766 unsigned int cache_level);
/openbmc/linux/arch/x86/kernel/cpu/resctrl/
H A Dcore.c68 .cache_level = 3,
82 .cache_level = 2,
96 .cache_level = 3,
108 .cache_level = 3,
503 int id = get_cpu_cacheinfo_id(cpu, r->cache_level); in domain_add_cpu()
553 int id = get_cpu_cacheinfo_id(cpu, r->cache_level); in domain_remove_cpu()
H A Dpseudo_lock.c314 if (ci->info_list[i].level == plr->s->res->cache_level) { in pseudo_lock_region_init()
/openbmc/linux/drivers/iommu/
H A Dfsl_pamu.c260 u32 cache_level; in get_stash_id() local
293 …for (cache_level = PAMU_ATTR_CACHE_L1; (cache_level < PAMU_ATTR_CACHE_L3) && found; cache_level++)… in get_stash_id()
294 if (stash_dest_hint == cache_level) { in get_stash_id()
/openbmc/linux/tools/perf/
H A Dbuiltin-stat.c1362 u32 cache_level = stat_config.aggr_level; in cpu__get_cache_details() local
1366 cache->cache_lvl = (cache_level > MAX_CACHE_LVL) ? 0 : cache_level; in cpu__get_cache_details()
1389 if (cache_level > MAX_CACHE_LVL) { in cpu__get_cache_details()
1406 if (caches[i].level == cache_level) { in cpu__get_cache_details()
1407 cache->cache_lvl = cache_level; in cpu__get_cache_details()
1708 u32 cache_level, struct aggr_cpu_id *id) in perf_env__get_cache_id_for_cpu() argument
1714 id->cache_lvl = (cache_level > MAX_CACHE_LVL) ? 0 : cache_level; in perf_env__get_cache_id_for_cpu()
1729 if (cache_level <= MAX_CACHE_LVL && caches[i].level != cache_level) in perf_env__get_cache_id_for_cpu()
1751 u32 cache_level = (perf_stat.aggr_level) ?: stat_config.aggr_level; in perf_env__get_cache_aggr_by_cpu() local
1755 perf_env__get_cache_id_for_cpu(cpu, env, cache_level, &id); in perf_env__get_cache_aggr_by_cpu()
/openbmc/linux/include/linux/
H A Dresctrl.h171 int cache_level; member
/openbmc/linux/arch/ia64/include/asm/
H A Dpal.h909 ia64_pal_cache_config_info (u64 cache_level, u64 cache_type, pal_cache_config_info_t *conf) in ia64_pal_cache_config_info() argument
913 PAL_CALL(iprv, PAL_CACHE_INFO, cache_level, cache_type, 0); in ia64_pal_cache_config_info()
927 ia64_pal_cache_prot_info (u64 cache_level, u64 cache_type, pal_cache_protection_info_t *prot) in ia64_pal_cache_prot_info() argument
931 PAL_CALL(iprv, PAL_CACHE_PROT_INFO, cache_level, cache_type, 0); in ia64_pal_cache_prot_info()
/openbmc/linux/drivers/of/
H A Dbase.c1926 u32 cache_level = 0; in of_find_last_cache_level() local
1935 of_property_read_u32(prev, "cache-level", &cache_level); in of_find_last_cache_level()
1938 return cache_level; in of_find_last_cache_level()
/openbmc/linux/tools/arch/x86/kcpuid/
H A Dcpuid.csv93 4, 0, EAX, 7:5, cache_level, Cache Level (starts at 1)

12