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Searched refs:cache_addr (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/net/wireless/intel/iwlwifi/
H A Diwl-eeprom-read.c296 u16 cache_addr = 0; in iwl_read_eeprom() local
353 e[cache_addr / 2] = eeprom_data; in iwl_read_eeprom()
354 cache_addr += sizeof(u16); in iwl_read_eeprom()
/openbmc/linux/arch/sh/mm/
H A Dcache-sh2a.c39 static void sh2a_invalidate_line(unsigned long cache_addr, unsigned long v) in sh2a_invalidate_line() argument
43 __raw_writel((addr & CACHE_PHYSADDR_MASK), cache_addr | addr); in sh2a_invalidate_line()
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v4_0_3.c866 uint64_t cache_addr; in vcn_v4_0_3_start_sriov() local
944 cache_addr = adev->vcn.inst[vcn_inst].gpu_addr + offset; in vcn_v4_0_3_start_sriov()
946 regUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW), lower_32_bits(cache_addr)); in vcn_v4_0_3_start_sriov()
948 regUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH), upper_32_bits(cache_addr)); in vcn_v4_0_3_start_sriov()
954 cache_addr = adev->vcn.inst[vcn_inst].gpu_addr + offset + in vcn_v4_0_3_start_sriov()
958 regUVD_LMI_VCPU_CACHE2_64BIT_BAR_LOW), lower_32_bits(cache_addr)); in vcn_v4_0_3_start_sriov()
961 regUVD_LMI_VCPU_CACHE2_64BIT_BAR_HIGH), upper_32_bits(cache_addr)); in vcn_v4_0_3_start_sriov()
H A Dvcn_v4_0.c1217 uint64_t cache_addr; in vcn_v4_0_start_sriov() local
1298 cache_addr = adev->vcn.inst[i].gpu_addr + offset; in vcn_v4_0_start_sriov()
1301 lower_32_bits(cache_addr)); in vcn_v4_0_start_sriov()
1304 upper_32_bits(cache_addr)); in vcn_v4_0_start_sriov()
1312 cache_addr = adev->vcn.inst[i].gpu_addr + offset + in vcn_v4_0_start_sriov()
1316 lower_32_bits(cache_addr)); in vcn_v4_0_start_sriov()
1319 upper_32_bits(cache_addr)); in vcn_v4_0_start_sriov()
H A Dvcn_v3_0.c1286 uint64_t cache_addr; in vcn_v3_0_start_sriov() local
1362 cache_addr = adev->vcn.inst[i].gpu_addr + offset; in vcn_v3_0_start_sriov()
1365 lower_32_bits(cache_addr)); in vcn_v3_0_start_sriov()
1368 upper_32_bits(cache_addr)); in vcn_v3_0_start_sriov()
1376 cache_addr = adev->vcn.inst[i].gpu_addr + offset + in vcn_v3_0_start_sriov()
1380 lower_32_bits(cache_addr)); in vcn_v3_0_start_sriov()
1383 upper_32_bits(cache_addr)); in vcn_v3_0_start_sriov()
/openbmc/qemu/hw/intc/
H A Dxive2.c38 uint64_t cache_addr; in xive2_nvp_reporting_addr() local
40 cache_addr = xive_get_field32(NVP2_W6_REPORTING_LINE, nvp->w6) << 24 | in xive2_nvp_reporting_addr()
42 cache_addr <<= 8; /* aligned on a cache line pair */ in xive2_nvp_reporting_addr()
43 return cache_addr; in xive2_nvp_reporting_addr()