Searched refs:c2_insn (Results 1 – 2 of 2) sorted by relevance
| /openbmc/qemu/target/arm/ | ||
| H A D | cpu.h | 318 uint32_t c2_insn; /* MPU instruction cacheable bits. */ member |
| H A D | helper.c | 4311 .fieldoffset = offsetof(CPUARMState, cp15.c2_insn), .resetvalue = 0, }, |