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Searched refs:bwl1 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-sunxi/
H A Ddram_sunxi_dw.c86 u16 bwl1, in mbus_configure_port() argument
98 const u32 cfg1 = ((u32)bwl2 << 16) | (bwl1 & 0xffff); in mbus_configure_port()
105 #define MBUS_CONF(port, bwlimit, qos, acs, bwl0, bwl1, bwl2) \ argument
107 MBUS_QOS_ ## qos, 0, acs, bwl0, bwl1, bwl2)
H A Ddram_sun50i_h6.c121 u16 bwl1, in mbus_configure_port() argument
133 const u32 cfg1 = ((u32)bwl2 << 16) | (bwl1 & 0xffff); in mbus_configure_port()
140 #define MBUS_CONF(port, bwlimit, qos, acs, bwl0, bwl1, bwl2) \ argument
142 MBUS_QOS_ ## qos, 0, acs, bwl0, bwl1, bwl2)