/openbmc/linux/Documentation/core-api/wrappers/ |
H A D | memory-barriers.rst | 2 This is a simple wrapper to bring memory-barriers.txt into the RST world 6 Linux kernel memory barriers 13 .. include:: ../../memory-barriers.txt
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/openbmc/linux/tools/testing/selftests/bpf/benchs/ |
H A D | bench_htab_mem.c | 106 pthread_barrier_t *barriers; in htab_mem_bench_init_barriers() local 113 barriers = calloc(nr, sizeof(*barriers)); in htab_mem_bench_init_barriers() 114 if (!barriers) in htab_mem_bench_init_barriers() 119 pthread_barrier_init(&barriers[i], NULL, 2); in htab_mem_bench_init_barriers() 121 ctx.notify = barriers; in htab_mem_bench_init_barriers()
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/openbmc/linux/Documentation/translations/sp_SP/wrappers/ |
H A D | memory-barriers.rst | 2 This is a simple wrapper to bring memory-barriers.txt (Spanish 14 .. include:: ../memory-barriers.txt
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/openbmc/linux/Documentation/ |
H A D | memory-barriers.txt | 16 meant as a guide to using the various memory barriers provided by Linux, but 31 (2) to provide a guide as to how to use the barriers that are available. 51 (*) What are memory barriers? 54 - What may not be assumed about memory barriers? 55 - Address-dependency barriers (historical). 59 - Read memory barriers vs load speculation. 62 (*) Explicit kernel barriers. 65 - CPU memory barriers. 67 (*) Implicit kernel memory barriers. 78 (*) Where are memory barriers needed? [all …]
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H A D | atomic_t.txt | 160 ORDERING (go read memory-barriers.txt first) 188 The barriers: 193 ordering inherent to the op. These barriers act almost like a full smp_mb(): 201 These helper barriers exist because architectures have varying implicit 203 provide full ordered atomics and these barriers are no-ops.
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H A D | atomic_bitops.txt | 68 the same barriers as for atomic_t are used, see atomic_t.txt.
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/openbmc/qemu/docs/devel/ |
H A D | atomics.rst | 18 a very low level approach to concurrency, involving memory barriers 26 - compiler barriers: ``barrier()``; 28 - weak atomic access and manual memory barriers: ``qatomic_read()``, 39 atomic operations and memory barriers should be limited to inter-thread 54 case, ``qemu/atomic.h`` will reduce stronger memory barriers to simple 55 compiler barriers. 111 Weak atomic access and manual memory barriers 159 Memory barriers control the order of references to shared memory. 218 also be compiler barriers only. 220 Memory barriers and ``qatomic_load_acquire``/``qatomic_store_release`` are [all …]
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/openbmc/linux/Documentation/translations/zh_CN/core-api/ |
H A D | refcount-vs-atomic.rst | 28 memory-barriers.txt和atomic_t.txt提供了更多关于内存顺序的背景,包括通用的 35 序类型。如果想了解更广泛的情况,请查阅memory-barriers.txt文件。
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H A D | circular-buffers.rst | 210 关于Linux的内存屏障设施的描述,请查看Documentation/memory-barriers.txt。
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-bsp/flashrom/flashrom/ |
H A D | 0001-hwaccess-use-__asm__-as-is-done-elsewhere.patch | 29 …ps://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/Documentation/memory-barriers.txt 38 * use the strongest hardware memory barriers that exist on Sparc V9. */
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/openbmc/linux/Documentation/translations/ko_KR/ |
H A D | index.rst | 24 .. include:: ./memory-barriers.txt
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/openbmc/linux/Documentation/core-api/ |
H A D | circular-buffers.rst | 15 (2) Memory barriers for when the producer and the consumer of objects in the 29 (*) Using memory barriers with circular buffers. 134 Using memory barriers with circular buffers 137 By using memory barriers in conjunction with circular buffers, you can avoid 236 See also Documentation/memory-barriers.txt for a description of Linux's memory
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H A D | refcount-vs-atomic.rst | 22 memory-barriers.txt and atomic_t.txt provide more background to the 31 please consult memory-barriers.txt document. 69 barriers, but rely on CPU not to speculate on stores. This is only
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/openbmc/linux/Documentation/translations/zh_CN/ |
H A D | glossary.rst | 25 * memory barriers: 内存屏障。
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/openbmc/linux/tools/memory-model/litmus-tests/ |
H A D | SB+fencembonceonces.litmus | 6 * This litmus test demonstrates that full memory barriers suffice to
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H A D | R+fencembonceonces.litmus | 8 * propagation delays. Note that weakening either of the barriers would
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/openbmc/linux/Documentation/RCU/ |
H A D | lockdep.rst | 61 Use explicit check expression "c", and omit all barriers 66 Return the value of the pointer and omit all barriers, 101 all barriers and compiler constraints, it generates better code than do
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/openbmc/linux/drivers/staging/vc04_services/interface/ |
H A D | TODO | 36 * Review and comment memory barriers 38 There is a heavy use of memory barriers in this driver, it would be very
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/openbmc/linux/Documentation/virt/kvm/ |
H A D | vcpu-requests.rst | 179 [memory-barriers]_. 182 the memory barriers, allowing this requirement to be handled internally by 205 This solution also requires memory barriers to be placed carefully in both 206 the requesting thread and the receiving VCPU. With the memory barriers we 293 .. [memory-barriers] Documentation/memory-barriers.txt
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/openbmc/linux/Documentation/translations/zh_CN/locking/ |
H A D | spinlocks.rst | 33 Documentation/memory-barriers.txt
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/openbmc/qemu/host/include/generic/host/ |
H A D | store-insert-al16.h.inc | 26 /* With CONFIG_ATOMIC128, we can avoid the memory barriers. */
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/openbmc/linux/Documentation/translations/zh_CN/arch/arm64/ |
H A D | legacy_instructions.txt | 42 它是那些构架中正在被淘汰的指令,如 CP15 barriers(隔离指令),的默认处理方式。
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/openbmc/qemu/host/include/aarch64/host/ |
H A D | store-insert-al16.h.inc | 24 * We can do better without the barriers, and integrating the
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/openbmc/linux/Documentation/translations/zh_TW/arch/arm64/ |
H A D | legacy_instructions.txt | 46 它是那些構架中正在被淘汰的指令,如 CP15 barriers(隔離指令),的默認處理方式。
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/openbmc/linux/Documentation/admin-guide/ |
H A D | ext4.rst | 56 note that ext4 enables write barriers by default, while ext3 does 57 not enable write barriers by default. So it is useful to use 58 explicitly specify whether barriers are enabled or not when via the 59 '-o barriers=[0|1]' mount option for both ext3 and ext4 filesystems 199 This enables/disables the use of write barriers in the jbd code. 201 which can support barriers, and if jbd gets an error on a barrier 202 write, it will disable again with a warning. Write barriers enforce 205 battery-backed in one way or another, disabling barriers may safely 207 also be used to enable or disable barriers, for consistency with other
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