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Searched refs:asic_type (Results 1 – 25 of 108) sorted by relevance

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/openbmc/linux/sound/soc/amd/
H A Dacp-pcm-dma.c206 u32 asic_type) in set_acp_sysmem_dma_descriptors() argument
218 switch (asic_type) { in set_acp_sysmem_dma_descriptors()
235 switch (asic_type) { in set_acp_sysmem_dma_descriptors()
264 u16 dma_dscr_idx, u32 asic_type) in set_acp_to_i2s_dma_descriptors() argument
332 u32 asic_type) in config_acp_dma() argument
350 rtd->dma_dscr_idx_1, asic_type); in config_acp_dma()
355 rtd->dma_dscr_idx_2, asic_type); in config_acp_dma()
552 static int acp_init(void __iomem *acp_mmio, u32 asic_type) in acp_init() argument
638 if (asic_type != CHIP_STONEY) { in acp_init()
783 switch (intr_data->asic_type) { in acp_dma_open()
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/openbmc/linux/drivers/accel/habanalabs/common/
H A Dhabanalabs_drv.c84 enum hl_asic_type asic_type = ASIC_INVALID; in get_asic_type() local
88 asic_type = ASIC_GOYA; in get_asic_type()
91 asic_type = ASIC_GAUDI; in get_asic_type()
94 asic_type = ASIC_GAUDI_SEC; in get_asic_type()
99 asic_type = ASIC_GAUDI2; in get_asic_type()
102 asic_type = ASIC_GAUDI2B; in get_asic_type()
105 asic_type = ASIC_GAUDI2C; in get_asic_type()
115 return asic_type; in get_asic_type()
118 static bool is_asic_secured(enum hl_asic_type asic_type) in is_asic_secured() argument
120 switch (asic_type) { in is_asic_secured()
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/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dnbio_v7_4.c114 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_get_rev_id()
159 if (adev->asic_type == CHIP_ALDEBARAN && instance == 4) in nbio_v7_4_sdma_doorbell_range()
187 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_vcn_doorbell_range()
371 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_handle_ras_controller_intr_no_bifring()
382 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_handle_ras_controller_intr_no_bifring()
427 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring()
439 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring()
460 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_set_ras_controller_irq_state()
472 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_set_ras_controller_irq_state()
505 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_set_ras_err_event_athub_irq_state()
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H A Dumc_v6_1.c100 if (adev->asic_type == CHIP_ARCTURUS) { in umc_v6_1_clear_error_count_per_channel()
178 if (adev->asic_type == CHIP_ARCTURUS) { in umc_v6_1_query_correctable_error_count()
233 if (adev->asic_type == CHIP_ARCTURUS) { in umc_v6_1_querry_uncorrectable_error_count()
268 if ((adev->asic_type == CHIP_ARCTURUS) && in umc_v6_1_query_ras_error_count()
285 if ((adev->asic_type == CHIP_ARCTURUS) && in umc_v6_1_query_ras_error_count()
305 if (adev->asic_type == CHIP_ARCTURUS) { in umc_v6_1_query_error_address()
367 if ((adev->asic_type == CHIP_ARCTURUS) && in umc_v6_1_query_ras_error_address()
383 if ((adev->asic_type == CHIP_ARCTURUS) && in umc_v6_1_query_ras_error_address()
397 if (adev->asic_type == CHIP_ARCTURUS) { in umc_v6_1_err_cnt_init_per_channel()
H A Dgfxhub_v1_1.c52 if (adev->asic_type == CHIP_ALDEBARAN) { in gfxhub_v1_1_get_xgmi_info()
70 switch (adev->asic_type) { in gfxhub_v1_1_get_xgmi_info()
94 if (adev->asic_type == CHIP_ALDEBARAN) { in gfxhub_v1_1_get_xgmi_info()
H A Dvce_v3_0.c305 if (adev->asic_type >= CHIP_STONEY) in vce_v3_0_start()
342 if (adev->asic_type >= CHIP_STONEY) in vce_v3_0_stop()
368 if ((adev->asic_type == CHIP_FIJI) || in vce_v3_0_get_harvest_config()
369 (adev->asic_type == CHIP_STONEY)) in vce_v3_0_get_harvest_config()
389 if ((adev->asic_type == CHIP_POLARIS10) || in vce_v3_0_get_harvest_config()
390 (adev->asic_type == CHIP_POLARIS11) || in vce_v3_0_get_harvest_config()
391 (adev->asic_type == CHIP_POLARIS12) || in vce_v3_0_get_harvest_config()
392 (adev->asic_type == CHIP_VEGAM)) in vce_v3_0_get_harvest_config()
568 if (adev->asic_type >= CHIP_STONEY) { in vce_v3_0_mc_resume()
975 if (adev->asic_type >= CHIP_STONEY) { in vce_v3_0_set_ring_funcs()
H A Damdgpu_acp.c313 adev->acp.acp_cell[0].platform_data = &adev->asic_type; in acp_hw_init()
314 adev->acp.acp_cell[0].pdata_size = sizeof(adev->asic_type); in acp_hw_init()
351 switch (adev->asic_type) { in acp_hw_init()
363 switch (adev->asic_type) { in acp_hw_init()
380 switch (adev->asic_type) { in acp_hw_init()
421 adev->acp.acp_cell[0].platform_data = &adev->asic_type; in acp_hw_init()
422 adev->acp.acp_cell[0].pdata_size = sizeof(adev->asic_type); in acp_hw_init()
H A Ddf_v3_6.c223 if ((adev->asic_type == CHIP_ARCTURUS && in df_v3_6_query_hashes()
225 (adev->asic_type == CHIP_ALDEBARAN && in df_v3_6_query_hashes()
280 if (adev->asic_type == CHIP_ALDEBARAN) { in df_v3_6_get_fb_channel_number()
520 switch (adev->asic_type) { in df_v3_6_pmc_start()
562 switch (adev->asic_type) { in df_v3_6_pmc_stop()
601 switch (adev->asic_type) { in df_v3_6_pmc_get_count()
H A Dvi.c105 #define ASIC_IS_P22(asic_type, rid) ((asic_type >= CHIP_POLARIS10) && \ argument
106 (asic_type <= CHIP_POLARIS12) && \
260 switch (adev->asic_type) { in vi_query_video_codecs()
496 switch (adev->asic_type) { in vi_init_golden_registers()
546 switch (adev->asic_type) { in vi_get_xclk()
902 switch (adev->asic_type) { in vi_asic_supports_baco()
928 switch (adev->asic_type) { in vi_asic_reset_method()
1131 adev->asic_type < CHIP_POLARIS10) in vi_program_aspm()
1270 if ((adev->asic_type == CHIP_POLARIS12 && in vi_program_aspm()
1272 ASIC_IS_P22(adev->asic_type, adev->external_rev_id)) { in vi_program_aspm()
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H A Damdgpu_doorbell_mgr.c192 if (adev->asic_type < CHIP_BONAIRE) { in amdgpu_doorbell_init()
221 if (adev->asic_type >= CHIP_VEGA10) in amdgpu_doorbell_init()
H A Dmmhub_v1_0.c456 if (adev->asic_type != CHIP_RAVEN) { in mmhub_v1_0_update_medium_grain_clock_gating()
472 if (adev->asic_type != CHIP_RAVEN) in mmhub_v1_0_update_medium_grain_clock_gating()
489 if (adev->asic_type != CHIP_RAVEN) in mmhub_v1_0_update_medium_grain_clock_gating()
502 if (adev->asic_type != CHIP_RAVEN) in mmhub_v1_0_update_medium_grain_clock_gating()
508 if (adev->asic_type != CHIP_RAVEN && def2 != data2) in mmhub_v1_0_update_medium_grain_clock_gating()
534 switch (adev->asic_type) { in mmhub_v1_0_set_clockgating()
H A Damdgpu_uvd.c194 switch (adev->asic_type) { in amdgpu_uvd_sw_init()
277 if (adev->asic_type < CHIP_VEGA20) { in amdgpu_uvd_sw_init()
298 if ((adev->asic_type == CHIP_POLARIS10 || in amdgpu_uvd_sw_init()
299 adev->asic_type == CHIP_POLARIS11) && in amdgpu_uvd_sw_init()
350 switch (adev->asic_type) { in amdgpu_uvd_sw_init()
364 adev->uvd.use_ctx_buf = adev->asic_type >= CHIP_POLARIS10; in amdgpu_uvd_sw_init()
431 if (adev->asic_type < CHIP_POLARIS10) { in amdgpu_uvd_suspend()
1137 if (adev->asic_type >= CHIP_VEGA10) in amdgpu_uvd_send_msg()
H A Dgmc_v8_0.c123 switch (adev->asic_type) { in gmc_v8_0_init_golden_registers()
220 switch (adev->asic_type) { in gmc_v8_0_init_microcode()
579 switch (adev->asic_type) { in gmc_v8_0_mc_init()
1097 if ((adev->asic_type == CHIP_FIJI) || in gmc_v8_0_sw_init()
1098 (adev->asic_type == CHIP_VEGAM)) in gmc_v8_0_sw_init()
1205 if (adev->asic_type == CHIP_TONGA) { in gmc_v8_0_hw_init()
1211 } else if (adev->asic_type == CHIP_POLARIS11 || in gmc_v8_0_hw_init()
1212 adev->asic_type == CHIP_POLARIS10 || in gmc_v8_0_hw_init()
1213 adev->asic_type == CHIP_POLARIS12) { in gmc_v8_0_hw_init()
1659 switch (adev->asic_type) { in gmc_v8_0_set_clockgating_state()
H A Dgfx_v8_0.c740 switch (adev->asic_type) { in gfx_v8_0_init_golden_registers()
932 if ((adev->asic_type != CHIP_STONEY) && in gfx_v8_0_free_microcode()
933 (adev->asic_type != CHIP_TOPAZ)) in gfx_v8_0_free_microcode()
952 switch (adev->asic_type) { in gfx_v8_0_init_microcode()
984 if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) { in gfx_v8_0_init_microcode()
1001 if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) { in gfx_v8_0_init_microcode()
1019 if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) { in gfx_v8_0_init_microcode()
1095 if (adev->asic_type >= CHIP_POLARIS10 && adev->asic_type <= CHIP_POLARIS12) { in gfx_v8_0_init_microcode()
1112 if ((adev->asic_type != CHIP_STONEY) && in gfx_v8_0_init_microcode()
1113 (adev->asic_type != CHIP_TOPAZ)) { in gfx_v8_0_init_microcode()
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H A Dsi.c992 switch (adev->asic_type) { in si_query_video_codecs()
2044 switch (adev->asic_type) { in si_common_early_init()
2164 switch (adev->asic_type) { in si_init_golden_registers()
2500 if ((adev->asic_type != CHIP_OLAND) && (adev->asic_type != CHIP_HAINAN)) { in si_program_aspm()
2549 if ((adev->asic_type == CHIP_OLAND) || (adev->asic_type == CHIP_HAINAN)) in si_program_aspm()
2556 if ((adev->asic_type == CHIP_OLAND) || (adev->asic_type == CHIP_HAINAN)) in si_program_aspm()
2735 switch (adev->asic_type) { in si_set_ip_blocks()
H A Damdgpu_virt.c58 if (adev->asic_type != CHIP_ALDEBARAN && in amdgpu_virt_init_setting()
59 adev->asic_type != CHIP_ARCTURUS && in amdgpu_virt_init_setting()
720 switch (adev->asic_type) { in amdgpu_detect_virtualization()
752 if (amdgpu_sriov_vf(adev) && adev->asic_type == CHIP_SIENNA_CICHLID) in amdgpu_detect_virtualization()
760 switch (adev->asic_type) { in amdgpu_detect_virtualization()
788 DRM_ERROR("Unknown asic type: %d!\n", adev->asic_type); in amdgpu_detect_virtualization()
H A Dnbio_v2_3.c504 if (!((adev->asic_type >= CHIP_NAVI10) && in nbio_v2_3_apply_lc_spc_mode_wa()
505 (adev->asic_type <= CHIP_NAVI12))) in nbio_v2_3_apply_lc_spc_mode_wa()
528 if (adev->asic_type != CHIP_NAVI10) in nbio_v2_3_apply_l1_link_width_reconfig_wa()
H A Damdgpu_device.c1161 if (adev->asic_type >= CHIP_BONAIRE) in amdgpu_device_resize_fb_bar()
1222 if (adev->asic_type == CHIP_FIJI) { in amdgpu_device_need_post()
1248 if (adev->asic_type >= CHIP_BONAIRE) in amdgpu_device_need_post()
1428 adev->asic_type < CHIP_RAVEN) in amdgpu_device_init_apu_flags()
1431 switch (adev->asic_type) { in amdgpu_device_init_apu_flags()
1915 switch (adev->asic_type) { in amdgpu_device_parse_gpu_info_fw()
1962 if (adev->asic_type == CHIP_NAVI12) in amdgpu_device_parse_gpu_info_fw()
2040 switch (adev->asic_type) { in amdgpu_device_ip_early_init()
2110 if (amdgpu_sriov_vf(adev) && adev->asic_type == CHIP_SIENNA_CICHLID) in amdgpu_device_ip_early_init()
2224 if (adev->asic_type >= CHIP_VEGA10) { in amdgpu_device_fw_loading()
[all …]
H A Dcik.c133 switch (adev->asic_type) { in cik_query_video_codecs()
832 switch (adev->asic_type) { in cik_init_golden_registers()
1380 switch (adev->asic_type) { in cik_asic_supports_baco()
1402 switch (adev->asic_type) { in cik_asic_reset_method()
2020 switch (adev->asic_type) { in cik_common_early_init()
2124 if (adev->asic_type == CHIP_KABINI) { in cik_common_early_init()
2241 switch (adev->asic_type) { in cik_set_ip_blocks()
H A Damdgpu_fw_attestation.c125 if (adev->asic_type >= CHIP_SIENNA_CICHLID) in amdgpu_is_fw_attestation_supported()
H A Damdgpu_vm_pt.c469 if (adev->asic_type >= CHIP_VEGA10) { in amdgpu_vm_pt_clear()
827 } else if (adev->asic_type >= CHIP_VEGA10 && in amdgpu_vm_pte_update_flags()
903 if (params->adev->asic_type < CHIP_VEGA10) in amdgpu_vm_pte_fragment()
976 } else if (adev->asic_type < CHIP_VEGA10 && in amdgpu_vm_ptes_update()
/openbmc/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_flat_memory.c390 switch (dev->adev->asic_type) { in kfd_init_apertures()
407 dev->adev->asic_type); in kfd_init_apertures()
H A Dkfd_device.c178 uint32_t asic_type = kfd->adev->asic_type; in kfd_device_info_init() local
224 if (asic_type != CHIP_KAVERI && in kfd_device_info_init()
225 asic_type != CHIP_HAWAII && in kfd_device_info_init()
226 asic_type != CHIP_TONGA) in kfd_device_info_init()
229 if (asic_type != CHIP_HAWAII && !vf) in kfd_device_info_init()
240 switch (adev->asic_type) { in kgd2kfd_probe()
421 amdgpu_asic_name[adev->asic_type], vf ? "VF" : ""); in kgd2kfd_probe()
/openbmc/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dkv_dpm.c764 if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) in kv_unforce_levels()
1387 if (adev->asic_type == CHIP_MULLINS) in kv_dpm_disable()
1747 if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) in kv_dpm_powergate_acp()
1928 if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) { in kv_dpm_set_power_state()
1954 if (adev->asic_type == CHIP_MULLINS) in kv_dpm_set_power_state()
2008 if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) {
2113 if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) in kv_force_dpm_highest()
2133 if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) in kv_force_dpm_lowest()
2289 if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) { in kv_apply_state_adjust_rules()
2350 if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) { in kv_calculate_nbps_level_settings()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu7_baco.c72 switch (adev->asic_type) { in smu7_baco_set_state()

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