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/openbmc/qemu/target/riscv/
H A Dcsr.c280 static RISCVException any32(CPURISCVState *env, int csrno) in any32() function
305 return any32(env, csrno); in aia_any32()
5027 [CSR_MCYCLEH] = { "mcycleh", any32, read_hpmcounterh,
5029 [CSR_MINSTRETH] = { "minstreth", any32, read_hpmcounterh,
5052 [CSR_MSTATUSH] = { "mstatush", any32, read_mstatush,
5054 [CSR_MEDELEGH] = { "medelegh", any32, read_zero, write_ignore,