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Searched refs:andi (Results 1 – 25 of 173) sorted by relevance

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/openbmc/linux/arch/microblaze/kernel/
H A Dhw_exception_handler.S337 andi r5, r4, 0x1F; /* Extract ESR[EXC] */
373 andi r6, r4, 0x1000 /* Check ESR[DS] */
382 andi r6, r4, 0x3E0; /* Mask and extract the register operand */
391 andi r6, r4, 0x400; /* Extract ESR[S] */
394 andi r6, r4, 0x800; /* Extract ESR[W] */
442 andi r6, r6, 0x800; /* Extract ESR[W] */
498 andi r4, r4, ESR_DIZ /* ESR_Z - zone protection */
512 andi r4, r4, ESR_DIZ /* ESR_Z */
521 andi r5, r5, PAGE_SIZE - 4
525 andi r5, r4, PAGE_MASK /* Extract L2 (pte) base address */
[all …]
H A Dhead.S228 andi r4,r4,0xfffffc00 /* Mask off the real page number */
242 andi r29, r9, 0x100000
245 andi r29, r9, 0x400000
248 andi r29, r9, 0x1000000
252 andi r3,r3,0xfffffc00 /* Mask off the effective page number */
272 andi r29, r10, 0x100000
275 andi r29, r10, 0x400000
278 andi r29, r10, 0x1000000
285 andi r3,r3,0xfffffc00 /* Mask off the effective page number */
/openbmc/linux/arch/mips/include/asm/mach-loongson64/
H A Dkernel-entry-init.h29 andi t1, t0, PRID_IMP_MASK
34 andi t0, (PRID_IMP_MASK | PRID_REV_MASK)
60 andi t1, t0, PRID_IMP_MASK
65 andi t0, (PRID_IMP_MASK | PRID_REV_MASK)
83 andi t1, MIPS_EBASE_CPUNUM
88 andi s0, s0, (PRID_IMP_MASK | PRID_REV_MASK)
/openbmc/linux/arch/mips/kernel/
H A Dentry.S43 andi t0, t0, KU_USER
51 andi t0, a2, _TIF_WORK_MASK # (ignoring syscall_trace)
61 andi t1, t0, _TIF_NEED_RESCHED
64 andi t0, 1
122 andi t0, a2, _TIF_NEED_RESCHED # a2 is preloaded with TI_FLAGS
132 andi t0, a2, _TIF_WORK_MASK # is there any work to be done
135 andi t0, a2, _TIF_NEED_RESCHED
H A Dbmips_vec.S60 andi k1, 0x8000
97 andi k0, PRID_IMP_BMIPS5000
134 andi k0, 0xff00
185 andi k0, 0xff00
207 andi k0, PRID_IMP_BMIPS5000
280 andi t2, t0, 0xff00
285 andi t0, 0xff
305 andi t2, PRID_IMP_BMIPS5000
/openbmc/linux/arch/powerpc/boot/
H A Dstring.S102 andi. r0,r6,3
110 6: andi. r5,r5,3
131 andi. r0,r6,3 /* get dest word aligned */
134 andi. r0,r4,3 /* check src word aligned too */
141 andi. r5,r5,7
159 andi. r7,r7,3 /* will source be word-aligned too? */
180 andi. r0,r6,3
183 andi. r0,r4,3
190 andi. r5,r5,7
205 andi. r7,r7,3
/openbmc/linux/arch/riscv/lib/
H A Dmemmove.S62 andi t0, a2, -(2 * SZREG)
68 andi t5, t3, -SZREG
69 andi t6, t4, -SZREG
89 andi t1, t0, (SZREG - 1)
99 andi a5, a1, (SZREG - 1) /* Find the alignment offset of src (a1) */
102 andi a1, a1, -SZREG /* Align the src pointer */
161 andi a5, a4, (SZREG - 1) /* Find the alignment offset of src (a4) */
164 andi a4, a4, -SZREG /* Align the src pointer */
H A Dmemcpy.S18 andi a3, t6, SZREG-1
19 andi a4, a1, SZREG-1
27 andi a3, a1, ~(SZREG-1)
40 andi a4, a2, ~((16*SZREG)-1)
79 andi a2, a2, (16*SZREG)-1 /* Update count */
89 andi a5, a5, 3
H A Dmemset.S24 andi a3, a3, ~(SZREG-1)
36 andi a1, a1, 0xff
47 andi a4, a2, ~(SZREG-1)
50 andi a4, a4, 31*SZREG /* Calculate remainder */
101 andi a2, a2, SZREG-1 /* Update count */
H A Duaccess.S48 andi t1, t1, ~(SZREG-1)
67 andi a3, a1, SZREG-1
119 andi t1, t0, ~(SZREG-1)
121 andi a1, a1, ~(SZREG-1)
198 andi t1, a3, ~(SZREG-1)
199 andi t0, t0, ~(SZREG-1)
/openbmc/linux/arch/powerpc/lib/
H A Dcopy_32.S74 2: andi. r0, r5, 1
99 andi. r0,r3,3
134 6: andi. r5,r5,3
182 andi. r0,r0,CACHELINE_MASK /* # bytes to start of cache line */
187 andi. r8,r0,3 /* get it word-aligned first */
233 64: andi. r0,r5,3
252 andi. r0,r6,3 /* get dest word aligned */
260 andi. r5,r5,7
293 andi. r0,r6,3
301 andi. r5,r5,7
[all …]
H A Dchecksum_32.S30 andi. r0,r3,2 /* Align buffer to longword boundary */
38 1: andi. r6,r6,3 /* Prepare to handle words 4 by 4 */
65 3: andi. r0,r4,2
70 4: andi. r0,r4,1
130 andi. r0,r0,CACHELINE_MASK /* # bytes to start of cache line */
139 andi. r8,r0,3 /* get it word-aligned first */
222 64: andi. r0,r5,2
229 65: andi. r0,r5,1
/openbmc/linux/arch/riscv/kernel/
H A Dkexec_relocate.S67 andi t1, t0, 0x1
69 andi s4, t0, ~0x1
74 andi t1, t0, 0x2
76 andi s0, t0, ~0x2
83 andi t1, t0, 0x4
92 andi t1, t0, 0x8
94 andi t0, t0, ~0x8
/openbmc/u-boot/arch/mips/mach-ath79/ar933x/
H A Dlowlevel_init.S101 andi t1, t5, 0x10
130 andi t1, t1, 0x02
136 andi t1, t5, 0x01 # t5 BOOT_STRAP
163 andi t1, t5, 0x01 # t5 BOOT_STRAP
177 andi t1, t5, 0x01 # t5 BOOT_STRAP
201 andi t1, t5, 0x01 # t5 BOOT_STRAP
255 andi t1, t1, 0x8
/openbmc/linux/arch/nios2/include/asm/
H A Dasm-macros.h26 andi \reg1, \reg2, %lo(\mask)
83 andi \reg1, \reg2, (1 << \bit)
126 andi \reg1, \reg2, (1 << \bit)
147 andi \reg1, \reg2, (1 << \bit)
168 andi \reg1, \reg2, (1 << \bit)
169 andi \reg2, \reg2, %lo(~(1 << \bit))
/openbmc/linux/arch/loongarch/kernel/
H A Drelocate_kernel.S38 andi s2, s1, IND_DESTINATION
46 andi s2, s1, IND_INDIRECTION
54 andi s2, s1, IND_DONE
60 andi s2, s1, IND_SOURCE
/openbmc/linux/arch/openrisc/kernel/
H A Dhead.S224 l.andi r30,r30,SPR_SR_SM ;\
264 l.andi r30,r30,SPR_SR_DSX ;\
306 l.andi r3,r3,0x1f00 ;\
730 l.andi r25,r25,SPR_UPR_PMP
829 l.andi r26,r24,SPR_UPR_ICP
847 l.andi r26,r24,SPR_ICCFGR_CBS
856 l.andi r26,r24,SPR_ICCFGR_NCS
895 l.andi r26,r24,SPR_UPR_DCP
913 l.andi r26,r24,SPR_DCCFGR_CBS
922 l.andi r26,r24,SPR_DCCFGR_NCS
[all …]
/openbmc/linux/arch/mips/lib/
H A Dcsum_partial.S115 andi t7, src, 0x1 /* odd buffer? */
119 andi t8, src, 0x2
128 andi t8, src, 0x2
144 andi t8, src, 0x4
146 andi t8, src, 0x8
152 andi t8, src, 0x8
156 andi t8, src, 0x10
170 andi t8, src, 0x10
190 andi t2, a1, 0x40
205 andi t2, a1, 0x20
[all …]
H A Dmemset.S98 andi t0, a0, STORMASK /* aligned? */
156 andi t0, a2, 0x40-STORSIZE
184 2: andi a2, STORMASK /* At most one long to go */
258 andi a2, 0x3f
270 andi a2, STORMASK
304 andi a1, 0xff /* spread fillword */
/openbmc/u-boot/arch/powerpc/lib/
H A Dppcstring.S77 andi. r0,r6,3
85 6: andi. r5,r5,3
106 andi. r0,r6,3 /* get dest word aligned */
114 andi. r5,r5,7
148 andi. r0,r6,3
156 andi. r5,r5,7
/openbmc/linux/arch/nios2/kernel/
H A Dinsnemu.S160 andi r2, r2, 0x3f /* r2 = 00000000000000000000000000,PPPPPP */
161 andi r3, r3, 0x7c /* r3 = 0000000000000000000000000,AAAAA,00 */
162 andi r5, r5, 0x7c /* r5 = 0000000000000000000000000,BBBBB,00 */
163 andi r6, r6, 0x7c /* r6 = 0000000000000000000000000,CCCCC,00 */
196 andi r4, r4, 0x3f /* r4 = 00000000000000000000000000,-OPX-- */
210 andi r7, r4, 0x02 /* For R-type multiply instructions,
439 andi r7, r12, 1
/openbmc/u-boot/arch/mips/lib/
H A Dcache_init.S52 andi \line_sz, \line_sz, (MIPS_CONF1_DL >> MIPS_CONF1_DL_SHF)
60 andi \sz, \sz, (MIPS_CONF1_DA >> MIPS_CONF1_DA_SHF)
68 andi $1, $1, (MIPS_CONF1_DS >> MIPS_CONF1_DS_SHF)
70 andi $1, $1, 0x7
193 andi R_L2_LINE, R_L2_LINE, MIPS_CONF2_SL >> MIPS_CONF2_SL_SHF
199 andi t1, t1, MIPS_CONF2_SA >> MIPS_CONF2_SA_SHF
204 andi t1, t1, MIPS_CONF2_SS >> MIPS_CONF2_SS_SHF
423 andi a0, a0, CONF_CM_CMASK
/openbmc/linux/arch/microblaze/lib/
H A Dfastcopy.S48 andi r4, r5, 3 /* n = d & 3 */
72 andi r4, r7, 0xffffffe0 /* n = c & ~31 */
75 andi r9, r6, 3 /* t1 = s & 3 */
103 andi r8, r6, 0xfffffffc /* as = s & ~3 */
264 andi r4, r7, 0xfffffffc /* n = c & ~3 */
267 andi r9, r6, 3 /* t1 = s & 3 */
281 andi r8, r6, 0xfffffffc /* as = s & ~3 */
372 andi r4, r5, 3 /* n = d & 3 */
394 andi r4, r7, 0xffffffe0 /* n = c & ~31 */
397 andi r9, r6, 3 /* t1 = s & 3 */
[all …]
/openbmc/linux/arch/powerpc/mm/nohash/
H A Dtlb_low.S144 andi. r0,r8,1 /* Check if way 0 is bolted */
153 andi. r0,r6,PPC47x_TLB0_VALID /* Valid entry ? */
163 andi. r0,r3,0x1f /* Need to load a new boltmap word ? */
241 andi. r3,r3,MMUCSR0_TLBFI@l
265 andi. r3,r3,MMUCSR0_TLBFI@l
410 andi. r11,r11,MSR_IS
449 andi. r11,r11,MSR_IS
/openbmc/linux/arch/powerpc/kernel/
H A Dkvm_emul.S66 andi. r30, r30, (MSR_EE|MSR_RI)
78 andi. r30, r30, MSR_EE
163 andi. r31, r30, MSR_EE
216 andi. r30, r30, MSR_EE
300 andi. r31, r31, MSR_DR | MSR_IR

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