Searched refs:amdgpu_vcn4_fw_shared (Results 1 – 4 of 4) sorted by relevance
82 struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_3_fw_shared_init()183 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_3_sw_fini()231 struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_3_hw_init()407 AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn4_fw_shared))); in vcn_v4_0_3_mc_resume()515 AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn4_fw_shared)), 0, indirect); in vcn_v4_0_3_mc_resume_dpg_mode()730 volatile struct amdgpu_vcn4_fw_shared *fw_shared = in vcn_v4_0_3_start_dpg_mode()887 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_3_start_sriov()990 AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn4_fw_shared))); in vcn_v4_0_3_start_sriov()1060 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_3_start()1268 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_3_stop()
127 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_sw_init()215 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_sw_fini()424 AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn4_fw_shared))); in vcn_v4_0_mc_resume()527 AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn4_fw_shared)), 0, indirect); in vcn_v4_0_mc_resume_dpg_mode()916 volatile struct amdgpu_vcn4_fw_shared *fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr; in vcn_v4_0_start_dpg_mode()1043 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_start()1238 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_start_sriov()1348 AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn4_fw_shared))); in vcn_v4_0_start_sriov()1460 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_stop()
355 struct amdgpu_vcn4_fw_shared { struct
177 fw_shared_size = AMDGPU_GPU_PAGE_ALIGN(sizeof(struct amdgpu_vcn4_fw_shared)); in amdgpu_vcn_sw_init()178 log_offset = offsetof(struct amdgpu_vcn4_fw_shared, fw_log); in amdgpu_vcn_sw_init()