Searched refs:ahb1enr (Results 1 – 5 of 5) sorted by relevance
71 u32 ahb1enr; /* RCC AHB1 peripheral clock enable */ member
201 uint32_t ahb1enr; member
618 FIELD_EX32(s->ahb1enr, AHB1ENR, _peripheral_name##EN)) in rcc_update_ahb1enr()944 s->ahb1enr = 0x00000100; in stm32l4x5_rcc_reset_hold()1014 retvalue = s->ahb1enr; in stm32l4x5_rcc_read()1153 s->ahb1enr = value; in stm32l4x5_rcc_write()1359 VMSTATE_UINT32(ahb1enr, Stm32l4x5RccState),
169 u32 ahb1enr; /* 0xd8 AHB1 Clock Register */ member181 #define RCC_AHB1ENR offsetof(struct stm32_rcc_regs, ahb1enr)
607 setbits_le32(®s->ahb1enr + offset, BIT(bit_index)); in stm32_clk_enable()