| /openbmc/linux/drivers/staging/sm750fb/ |
| H A D | sm750_accel.c | 20 static inline void write_dpr(struct lynx_accel *accel, int offset, u32 regValue) in write_dpr() argument
22 writel(regValue, accel->dprBase + offset); in write_dpr()
25 static inline u32 read_dpr(struct lynx_accel *accel, int offset) in read_dpr() argument
27 return readl(accel->dprBase + offset); in read_dpr()
30 static inline void write_dpPort(struct lynx_accel *accel, u32 data) in write_dpPort() argument
32 writel(data, accel->dpPortBase); in write_dpPort()
35 void sm750_hw_de_init(struct lynx_accel *accel) in sm750_hw_de_init() argument
40 write_dpr(accel, DE_MASKS, 0xFFFFFFFF); in sm750_hw_de_init()
52 write_dpr(accel, DE_STRETCH_FORMAT, in sm750_hw_de_init()
53 (read_dpr(accel, DE_STRETCH_FORMAT) & ~clr) | reg); in sm750_hw_de_init()
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| /openbmc/qemu/target/i386/hvf/ |
| H A D | x86hvf.c | 80 if (hv_vcpu_write_fpstate(cs->accel->fd, xsave, xsave_len)) { in hvf_put_xsave()
90 wvmcs(cs->accel->fd, VMCS_GUEST_IDTR_LIMIT, env->idt.limit); in hvf_put_segments()
91 wvmcs(cs->accel->fd, VMCS_GUEST_IDTR_BASE, env->idt.base); in hvf_put_segments()
93 wvmcs(cs->accel->fd, VMCS_GUEST_GDTR_LIMIT, env->gdt.limit); in hvf_put_segments()
94 wvmcs(cs->accel->fd, VMCS_GUEST_GDTR_BASE, env->gdt.base); in hvf_put_segments()
97 wvmcs(cs->accel->fd, VMCS_GUEST_CR3, env->cr[3]); in hvf_put_segments()
99 wvmcs(cs->accel->fd, VMCS_GUEST_IA32_EFER, env->efer); in hvf_put_segments()
101 macvm_set_cr4(cs->accel->fd, env->cr[4]); in hvf_put_segments()
102 macvm_set_cr0(cs->accel->fd, env->cr[0]); in hvf_put_segments()
133 hv_vcpu_write_msr(cs->accel->fd, MSR_IA32_SYSENTER_CS, in hvf_put_msrs()
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| H A D | hvf.c | 88 wreg(cpu->accel->fd, HV_X86_TPR, tpr); in vmx_update_tpr()
90 wvmcs(cpu->accel->fd, VMCS_TPR_THRESHOLD, 0); in vmx_update_tpr()
92 wvmcs(cpu->accel->fd, VMCS_TPR_THRESHOLD, (irr > tpr) ? tpr >> 4 : in vmx_update_tpr()
100 int tpr = rreg(cpu->accel->fd, HV_X86_TPR) >> 4; in update_apic_tpr()
218 hv_vcpu_interrupt(&cpu->accel->fd, 1); in hvf_kick_vcpu_thread()
286 wvmcs(cpu->accel->fd, VMCS_PIN_BASED_CTLS, in hvf_arch_init_vcpu()
291 wvmcs(cpu->accel->fd, VMCS_PRI_PROC_BASED_CTLS, in hvf_arch_init_vcpu()
306 wvmcs(cpu->accel->fd, VMCS_SEC_PROC_BASED_CTLS, in hvf_arch_init_vcpu()
309 wvmcs(cpu->accel->fd, VMCS_ENTRY_CTLS, in hvf_arch_init_vcpu()
311 wvmcs(cpu->accel->fd, VMCS_EXCEPTION_BITMAP, 0); /* Double fault */ in hvf_arch_init_vcpu()
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| H A D | x86.c | 64 base = rvmcs(cpu->accel->fd, VMCS_GUEST_GDTR_BASE); in x86_read_segment_descriptor()
65 limit = rvmcs(cpu->accel->fd, VMCS_GUEST_GDTR_LIMIT); in x86_read_segment_descriptor()
67 base = rvmcs(cpu->accel->fd, VMCS_GUEST_LDTR_BASE); in x86_read_segment_descriptor()
68 limit = rvmcs(cpu->accel->fd, VMCS_GUEST_LDTR_LIMIT); in x86_read_segment_descriptor()
87 base = rvmcs(cpu->accel->fd, VMCS_GUEST_GDTR_BASE); in x86_write_segment_descriptor()
88 limit = rvmcs(cpu->accel->fd, VMCS_GUEST_GDTR_LIMIT); in x86_write_segment_descriptor()
90 base = rvmcs(cpu->accel->fd, VMCS_GUEST_LDTR_BASE); in x86_write_segment_descriptor()
91 limit = rvmcs(cpu->accel->fd, VMCS_GUEST_LDTR_LIMIT); in x86_write_segment_descriptor()
105 target_ulong base = rvmcs(cpu->accel->fd, VMCS_GUEST_IDTR_BASE); in x86_read_call_gate()
106 uint32_t limit = rvmcs(cpu->accel->fd, VMCS_GUEST_IDTR_LIMIT); in x86_read_call_gate()
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| H A D | x86_descr.c | 50 return (uint32_t)rvmcs(cpu->accel->fd, vmx_segment_fields[seg].limit); in vmx_read_segment_limit()
55 return (uint32_t)rvmcs(cpu->accel->fd, vmx_segment_fields[seg].ar_bytes); in vmx_read_segment_ar()
60 return rvmcs(cpu->accel->fd, vmx_segment_fields[seg].base); in vmx_read_segment_base()
66 sel.sel = rvmcs(cpu->accel->fd, vmx_segment_fields[seg].selector); in vmx_read_segment_selector()
72 wvmcs(cpu->accel->fd, vmx_segment_fields[seg].selector, selector.sel); in vmx_write_segment_selector()
77 desc->sel = rvmcs(cpu->accel->fd, vmx_segment_fields[seg].selector); in vmx_read_segment_descriptor()
78 desc->base = rvmcs(cpu->accel->fd, vmx_segment_fields[seg].base); in vmx_read_segment_descriptor()
79 desc->limit = rvmcs(cpu->accel->fd, vmx_segment_fields[seg].limit); in vmx_read_segment_descriptor()
80 desc->ar = rvmcs(cpu->accel->fd, vmx_segment_fields[seg].ar_bytes); in vmx_read_segment_descriptor()
87 wvmcs(cpu->accel->fd, sf->base, desc->base); in vmx_write_segment_descriptor()
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| H A D | vmx.h | 182 wreg(cpu->accel->fd, HV_X86_RIP, rip); in macvm_set_rip()
186 val = rvmcs(cpu->accel->fd, VMCS_GUEST_INTERRUPTIBILITY); in macvm_set_rip()
190 wvmcs(cpu->accel->fd, VMCS_GUEST_INTERRUPTIBILITY, in macvm_set_rip()
202 uint32_t gi = (uint32_t) rvmcs(cpu->accel->fd, VMCS_GUEST_INTERRUPTIBILITY); in vmx_clear_nmi_blocking()
204 wvmcs(cpu->accel->fd, VMCS_GUEST_INTERRUPTIBILITY, gi); in vmx_clear_nmi_blocking()
213 uint32_t gi = (uint32_t)rvmcs(cpu->accel->fd, VMCS_GUEST_INTERRUPTIBILITY); in vmx_set_nmi_blocking()
215 wvmcs(cpu->accel->fd, VMCS_GUEST_INTERRUPTIBILITY, gi); in vmx_set_nmi_blocking()
221 val = rvmcs(cpu->accel->fd, VMCS_PRI_PROC_BASED_CTLS); in vmx_set_nmi_window_exiting()
222 wvmcs(cpu->accel->fd, VMCS_PRI_PROC_BASED_CTLS, val | in vmx_set_nmi_window_exiting()
231 val = rvmcs(cpu->accel->fd, VMCS_PRI_PROC_BASED_CTLS); in vmx_clear_nmi_window_exiting()
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| /openbmc/linux/drivers/platform/x86/ |
| H A D | classmate-laptop.c | 207 struct cmpc_accel *accel; in cmpc_accel_sensitivity_show_v4() local
211 accel = dev_get_drvdata(&inputdev->dev); in cmpc_accel_sensitivity_show_v4()
213 return sprintf(buf, "%d\n", accel->sensitivity); in cmpc_accel_sensitivity_show_v4()
222 struct cmpc_accel *accel; in cmpc_accel_sensitivity_store_v4() local
228 accel = dev_get_drvdata(&inputdev->dev); in cmpc_accel_sensitivity_store_v4()
238 accel->sensitivity = sensitivity; in cmpc_accel_sensitivity_store_v4()
256 struct cmpc_accel *accel; in cmpc_accel_g_select_show_v4() local
260 accel = dev_get_drvdata(&inputdev->dev); in cmpc_accel_g_select_show_v4()
262 return sprintf(buf, "%d\n", accel->g_select); in cmpc_accel_g_select_show_v4()
271 struct cmpc_accel *accel; in cmpc_accel_g_select_store_v4() local
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| /openbmc/qemu/accel/ |
| H A D | accel-system.c | 33 int accel_init_machine(AccelState *accel, MachineState *ms) in accel_init_machine() argument
35 AccelClass *acc = ACCEL_GET_CLASS(accel); in accel_init_machine()
37 ms->accelerator = accel; in accel_init_machine()
43 object_unref(OBJECT(accel)); in accel_init_machine()
57 AccelState *accel = ms->accelerator; in accel_setup_post() local
58 AccelClass *acc = ACCEL_GET_CLASS(accel); in accel_setup_post()
60 acc->setup_post(ms, accel); in accel_setup_post()
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| H A D | accel-user.c | 15 static AccelState *accel; in current_accel() local
17 if (!accel) { in current_accel()
21 accel = ACCEL(object_new_with_class(OBJECT_CLASS(ac))); in current_accel()
23 return accel; in current_accel()
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| H A D | meson.build | 1 specific_ss.add(files('accel-target.c'))
2 system_ss.add(files('accel-system.c', 'accel-blocker.c'))
3 user_ss.add(files('accel-user.c'))
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| H A D | accel-target.c | 125 AccelState *accel = current_accel(); in accel_cpu_common_realize() local
126 AccelClass *acc = ACCEL_GET_CLASS(accel); in accel_cpu_common_realize()
144 AccelState *accel = current_accel(); in accel_cpu_common_unrealize() local
145 AccelClass *acc = ACCEL_GET_CLASS(accel); in accel_cpu_common_unrealize()
155 AccelState *accel = current_accel(); in accel_supported_gdbstub_sstep_flags() local
156 AccelClass *acc = ACCEL_GET_CLASS(accel); in accel_supported_gdbstub_sstep_flags()
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| /openbmc/linux/drivers/iio/imu/inv_icm42600/ |
| H A D | inv_icm42600_buffer.c | 37 struct inv_icm42600_fifo_sensor_data accel; member
44 ssize_t inv_icm42600_fifo_decode_packet(const void *packet, const void **accel, in inv_icm42600_fifo_decode_packet() argument
54 *accel = NULL; in inv_icm42600_fifo_decode_packet()
72 *accel = &pack2->accel; in inv_icm42600_fifo_decode_packet()
81 *accel = &pack1->data; in inv_icm42600_fifo_decode_packet()
90 *accel = NULL; in inv_icm42600_fifo_decode_packet()
111 period_accel = inv_icm42600_odr_to_period(st->conf.accel.odr); in inv_icm42600_buffer_update_fifo_period()
217 wm_accel = inv_icm42600_wm_truncate(st->fifo.watermark.accel, packet_size); in inv_icm42600_buffer_update_watermark()
220 period_accel = inv_icm42600_odr_to_period(st->conf.accel.odr) / 1000UL; in inv_icm42600_buffer_update_watermark()
395 watermark = &st->fifo.watermark.accel; in inv_icm42600_buffer_postdisable()
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| H A D | inv_icm42600_core.c | 72 .accel = {
156 enum inv_icm42600_sensor_mode accel, in inv_icm42600_set_pwr_mgmt0() argument
160 enum inv_icm42600_sensor_mode oldaccel = st->conf.accel.mode; in inv_icm42600_set_pwr_mgmt0()
167 if (gyro == oldgyro && accel == oldaccel && temp == oldtemp) in inv_icm42600_set_pwr_mgmt0()
171 INV_ICM42600_PWR_MGMT0_ACCEL(accel); in inv_icm42600_set_pwr_mgmt0()
179 st->conf.accel.mode = accel; in inv_icm42600_set_pwr_mgmt0()
190 if (accel != oldaccel && oldaccel == INV_ICM42600_SENSOR_MODE_OFF) { in inv_icm42600_set_pwr_mgmt0()
223 struct inv_icm42600_sensor_conf *oldconf = &st->conf.accel; in inv_icm42600_set_accel_conf()
294 val = INV_ICM42600_GYRO_ACCEL_CONFIG0_ACCEL_FILT(st->conf.accel.filter) | in inv_icm42600_set_gyro_conf()
303 return inv_icm42600_set_pwr_mgmt0(st, conf->mode, st->conf.accel.mode, in inv_icm42600_set_gyro_conf()
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| /openbmc/qemu/target/arm/hvf/ |
| H A D | hvf.c | 555 ret = hv_vcpu_get_reg(cpu->accel->fd, hvf_reg_match[i].reg, &val); in hvf_get_registers()
561 ret = hv_vcpu_get_simd_fp_reg(cpu->accel->fd, hvf_fpreg_match[i].reg, in hvf_get_registers()
568 ret = hv_vcpu_get_reg(cpu->accel->fd, HV_REG_FPCR, &val); in hvf_get_registers()
573 ret = hv_vcpu_get_reg(cpu->accel->fd, HV_REG_FPSR, &val); in hvf_get_registers()
577 ret = hv_vcpu_get_reg(cpu->accel->fd, HV_REG_CPSR, &val); in hvf_get_registers()
586 if (cpu->accel->guest_debug_enabled) { in hvf_get_registers()
672 ret = hv_vcpu_get_sys_reg(cpu->accel->fd, hvf_sreg_match[i].reg, &val); in hvf_get_registers()
695 ret = hv_vcpu_set_reg(cpu->accel->fd, hvf_reg_match[i].reg, val); in hvf_put_registers()
701 ret = hv_vcpu_set_simd_fp_reg(cpu->accel->fd, hvf_fpreg_match[i].reg, in hvf_put_registers()
706 ret = hv_vcpu_set_reg(cpu->accel->fd, HV_REG_FPCR, vfp_get_fpcr(env)); in hvf_put_registers()
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| /openbmc/qemu/accel/hvf/ |
| H A D | hvf-accel-ops.c | 204 if (!cpu->accel->dirty) { in do_hvf_cpu_synchronize_state()
206 cpu->accel->dirty = true; in do_hvf_cpu_synchronize_state()
212 if (!cpu->accel->dirty) { in hvf_cpu_synchronize_state()
221 cpu->accel->dirty = true; in do_hvf_cpu_synchronize_set_dirty()
381 hv_return_t ret = hv_vcpu_destroy(cpu->accel->fd); in hvf_vcpu_destroy()
385 g_free(cpu->accel); in hvf_vcpu_destroy()
386 cpu->accel = NULL; in hvf_vcpu_destroy()
393 cpu->accel = g_new0(AccelCPUState, 1); in hvf_init_vcpu()
402 pthread_sigmask(SIG_BLOCK, NULL, &cpu->accel->unblock_ipi_mask); in hvf_init_vcpu()
403 sigdelset(&cpu->accel->unblock_ipi_mask, SIG_IPI); in hvf_init_vcpu()
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| /openbmc/linux/drivers/crypto/intel/qat/qat_c3xxx/ |
| H A D | adf_c3xxx_hw_data.c | 30 u32 accel; in get_accel_mask() local
32 accel = ~(fuses | straps) >> ADF_C3XXX_ACCELERATORS_REG_OFFSET; in get_accel_mask()
33 accel &= ADF_C3XXX_ACCELERATORS_MASK; in get_accel_mask()
35 return accel; in get_accel_mask()
44 int accel; in get_ae_mask() local
49 for_each_set_bit(accel, &disabled, ADF_C3XXX_MAX_ACCELERATORS) in get_ae_mask()
50 straps |= ae_disable << (accel << 1); in get_ae_mask()
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| /openbmc/linux/drivers/crypto/intel/qat/qat_c62x/ |
| H A D | adf_c62x_hw_data.c | 30 u32 accel; in get_accel_mask() local
32 accel = ~(fuses | straps) >> ADF_C62X_ACCELERATORS_REG_OFFSET; in get_accel_mask()
33 accel &= ADF_C62X_ACCELERATORS_MASK; in get_accel_mask()
35 return accel; in get_accel_mask()
44 int accel; in get_ae_mask() local
49 for_each_set_bit(accel, &disabled, ADF_C62X_MAX_ACCELERATORS) in get_ae_mask()
50 straps |= ae_disable << (accel << 1); in get_ae_mask()
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| /openbmc/linux/drivers/video/fbdev/matrox/ |
| H A D | matroxfb_accel.c | 116 int accel; in matrox_cfbX_init() local
127 accel = (minfo->fbcon.var.accel_flags & FB_ACCELF_TEXT) == FB_ACCELF_TEXT; in matrox_cfbX_init()
134 if (accel && !(mpitch & 1)) { in matrox_cfbX_init()
142 if (accel) { in matrox_cfbX_init()
153 if (accel) { in matrox_cfbX_init()
161 if (accel) { in matrox_cfbX_init()
169 if (accel) { in matrox_cfbX_init()
193 …minfo->accel.m_dwg_rect = M_DWG_TRAP | M_DWG_SOLID | M_DWG_ARZERO | M_DWG_SGNZERO | M_DWG_SHIFTZER… in matrox_cfbX_init()
194 if (isMilleniumII(minfo)) minfo->accel.m_dwg_rect |= M_DWG_TRANSC; in matrox_cfbX_init()
195 minfo->accel.m_opmode = mopmode; in matrox_cfbX_init()
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| /openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/fbset/fbset-modes/om-gta01/ |
| H A D | fb.modes | 7 accel false
14 accel false
21 accel false
28 accel false
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| /openbmc/linux/drivers/iio/accel/ |
| H A D | hid-sensor-accel-3d.c | 27 struct hid_sensor_hub_attribute_info accel[ACCEL_3D_CHANNEL_MAX]; member
152 report_id = accel_state->accel[chan->scan_index].report_id; in accel_3d_read_raw()
153 min = accel_state->accel[chan->scan_index].logical_minimum; in accel_3d_read_raw()
307 &st->accel[CHANNEL_SCAN_INDEX_X + i]); in accel_3d_parse_report()
312 st->accel[CHANNEL_SCAN_INDEX_X + i].size); in accel_3d_parse_report()
315 st->accel[0].index, in accel_3d_parse_report()
316 st->accel[0].report_id, in accel_3d_parse_report()
317 st->accel[1].index, st->accel[1].report_id, in accel_3d_parse_report()
318 st->accel[2].index, st->accel[2].report_id); in accel_3d_parse_report()
322 &st->accel[CHANNEL_SCAN_INDEX_X], in accel_3d_parse_report()
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| H A D | dmard09.c | 56 s16 accel; in dmard09_read_raw() local
73 accel = get_unaligned_le16(&buf[chan->address]); in dmard09_read_raw()
76 accel <<= 4; in dmard09_read_raw()
77 accel >>= 7; in dmard09_read_raw()
79 *val = accel; in dmard09_read_raw()
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| H A D | Makefile | 29 obj-$(CONFIG_BMC150_ACCEL) += bmc150-accel-core.o
30 obj-$(CONFIG_BMC150_ACCEL_I2C) += bmc150-accel-i2c.o
31 obj-$(CONFIG_BMC150_ACCEL_SPI) += bmc150-accel-spi.o
32 obj-$(CONFIG_BMI088_ACCEL) += bmi088-accel-core.o
33 obj-$(CONFIG_BMI088_ACCEL_SPI) += bmi088-accel-spi.o
42 obj-$(CONFIG_HID_SENSOR_ACCEL_3D) += hid-sensor-accel-3d.o
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| /openbmc/linux/drivers/iio/imu/st_lsm9ds0/ |
| H A D | st_lsm9ds0_core.c | 33 lsm9ds0->accel = devm_iio_device_alloc(dev, sizeof(*data)); in st_lsm9ds0_probe_accel()
34 if (!lsm9ds0->accel) in st_lsm9ds0_probe_accel()
37 lsm9ds0->accel->name = lsm9ds0->name; in st_lsm9ds0_probe_accel()
39 data = iio_priv(lsm9ds0->accel); in st_lsm9ds0_probe_accel()
44 return st_accel_common_probe(lsm9ds0->accel); in st_lsm9ds0_probe_accel()
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| /openbmc/linux/drivers/accel/ |
| H A D | Kconfig | 24 different device files, called accel/accel* (in /dev, sysfs
27 source "drivers/accel/habanalabs/Kconfig"
28 source "drivers/accel/ivpu/Kconfig"
29 source "drivers/accel/qaic/Kconfig"
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| /openbmc/qemu/docs/devel/migration/ |
| H A D | qpl-compression.rst | 22 | MultiFD Thread | |accel-config tool |
85 The ``accel-config`` tool is used to enable ``IAA`` devices and configure
90 For ``accel-config`` installation, please refer to `accel-config installation
97 #accel-config config-engine iax1/engine1.0 -g 0
98 #accel-config config-engine iax1/engine1.1 -g 0
99 #accel-config config-engine iax1/engine1.2 -g 0
100 #accel-config config-engine iax1/engine1.3 -g 0
101 #accel-config config-engine iax1/engine1.4 -g 0
102 #accel-config config-engine iax1/engine1.5 -g 0
103 #accel-config config-engine iax1/engine1.6 -g 0
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